RISC-V: Fix for icache flush issue on multicore processors.

	gcc/
	* config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
	* config/riscv/riscv.md (clear_cache): Use it.

From-SVN: r256109

gcc/ChangeLog

+2018-01-02  Andrew Waterman  <andrew@sifive.com>
+
+	* config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
+	* config/riscv/riscv.md (clear_cache): Use it.
+
 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
 
 	* web.c: Remove out-of-date comment.

gcc/config/riscv/linux.h

@@ -45,6 +45,8 @@ along with GCC; see the file COPYING3.  If not see
 #define LIB_SPEC GNU_USER_TARGET_LIB_SPEC " -latomic "
 #endif
 
+#define ICACHE_FLUSH_FUNC "__riscv_flush_icache"
+
 #define LINK_SPEC "\
 -melf" XLEN_SPEC "lriscv \
 %{shared} \

gcc/config/riscv/riscv.md

@@ -1456,7 +1456,13 @@
    (match_operand 1 "pmode_register_operand")]
   ""
 {
+#ifdef ICACHE_FLUSH_FUNC
+  emit_library_call (gen_rtx_SYMBOL_REF (Pmode, ICACHE_FLUSH_FUNC),
+		     LCT_NORMAL, VOIDmode, operands[0], Pmode,
+		     operands[1], Pmode, const0_rtx, Pmode);
+#else
   emit_insn (gen_fence_i ());
+#endif
   DONE;
 })