rs6000.c (altivec_expand_builtin): add ALTIVEC_BUILTIN_LD_INTERNAL_4sf and…

rs6000.c (altivec_expand_builtin): add ALTIVEC_BUILTIN_LD_INTERNAL_4sf and ALTIVEC_BUILTIN_ST_INTERNAL_4sf...

2001-11-30  Daniel Berlin  <dan@cgsoftware.com>

	* config/rs6000/rs6000.c (altivec_expand_builtin): add
	ALTIVEC_BUILTIN_LD_INTERNAL_4sf and ALTIVEC_BUILTIN_ST_INTERNAL_4sf,
	*_16qi,_8hi, rename existing V4SI ones to *_4si.
	(altivec_init_builtins): Ditto.
	(bdesc_2arg): Rename CODE_FOR_* to match changes in MD file.

	* config/rs6000/rs6000.md: Add attribute types vecsimple,
	veccomplex, vecfloat, and vecperm, for altivec instructions.
	Modify altivec patterns to use approriate attribute type.
	Modify altivec patterns to match RTL operations where approriate
	(IE no unspec where we can avoid it).
	Add vector unit scheduling for ppc7450.
	Rename patterns to what they are where approriate
	(altivec_vaddfp->addv4sf3, etc)

	* config/rs6000/rs6000.h (enum rs6000_builtins): Change VRS->VSR.
	Pass -mppc, and define _ARCH_PPC, if -mcpu=7450 is used.

	* config/rs6000/sysv4.h: Add -mcpu=7450.

	* testsuite/gcc.dg/altivec-1.c: Update test to take into account renamed
	_builtin_altivec_ld_interal function.

From-SVN: r47502

gcc/ChangeLog

+2001-11-30  Daniel Berlin  <dan@cgsoftware.com>
+
+	* config/rs6000/rs6000.c (altivec_expand_builtin): add 
+	ALTIVEC_BUILTIN_LD_INTERNAL_4sf and ALTIVEC_BUILTIN_ST_INTERNAL_4sf, 
+	*_16qi,_8hi, rename existing V4SI ones to *_4si.
+	(altivec_init_builtins): Ditto.
+	(bdesc_2arg): Rename CODE_FOR_* to match changes in MD file.
+	
+	* config/rs6000/rs6000.md: Add attribute types vecsimple,
+	veccomplex, vecfloat, and vecperm, for altivec instructions.  
+	Modify altivec patterns to use approriate attribute type.
+	Modify altivec patterns to match RTL operations where approriate
+	(IE no unspec where we can avoid it).
+	Add vector unit scheduling for ppc7450.
+	Rename patterns to what they are where approriate 
+	(altivec_vaddfp->addv4sf3, etc)
+
+	* config/rs6000/rs6000.h (enum rs6000_builtins): Change VRS->VSR.
+	Pass -mppc, and define _ARCH_PPC, if -mcpu=7450 is used.
+
+	* config/rs6000/sysv4.h: Add -mcpu=7450.
+
+	* testsuite/gcc.dg/altivec-1.c: Update test to take into account renamed 
+	_builtin_altivec_ld_interal function.
+
 2001-11-30  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
 	* configure.in (AC_CHECK_FUNCS): Delete strtoul, bsearch, popen,

gcc/config/rs6000/rs6000.h

@@ -76,6 +76,7 @@ Boston, MA 02111-1307, USA.  */
 %{mcpu=604e: -D_ARCH_PPC} \
 %{mcpu=620: -D_ARCH_PPC} \
 %{mcpu=740: -D_ARCH_PPC} \
+%{mcpu=7450: -D_ARCH_PPC} \
 %{mcpu=750: -D_ARCH_PPC} \
 %{mcpu=801: -D_ARCH_PPC} \
 %{mcpu=821: -D_ARCH_PPC} \
@@ -113,6 +114,7 @@ Boston, MA 02111-1307, USA.  */
 %{mcpu=604e: -mppc} \
 %{mcpu=620: -mppc} \
 %{mcpu=740: -mppc} \
+%{mcpu=7450: -mppc} \
 %{mcpu=750: -mppc} \
 %{mcpu=801: -mppc} \
 %{mcpu=821: -mppc} \
@@ -293,9 +295,9 @@ extern int target_flags;
 			N_("Use PowerPC-64 instruction set")},		\
   {"no-powerpc64",	- MASK_POWERPC64,				\
 			N_("Don't use PowerPC-64 instruction set")},	\
-  {"altivec",		MASK_ALTIVEC,					\
+  {"altivec",		MASK_ALTIVEC ,					\
 			N_("Use AltiVec instructions.")},		\
-  {"no-altivec",	- MASK_ALTIVEC,					\
+  {"no-altivec",	- MASK_ALTIVEC ,					\
 			N_("Don't use AltiVec instructions.")},	\
   {"new-mnemonics",	MASK_NEW_MNEMONICS,				\
 			N_("Use new mnemonics for PowerPC architecture")},\
@@ -2852,8 +2854,14 @@ extern int frame_pointer_needed;
 enum rs6000_builtins
 {
   /* AltiVec builtins.  */
-  ALTIVEC_BUILTIN_ST_INTERNAL,
-  ALTIVEC_BUILTIN_LD_INTERNAL,
+  ALTIVEC_BUILTIN_ST_INTERNAL_4si,
+  ALTIVEC_BUILTIN_LD_INTERNAL_4si,
+  ALTIVEC_BUILTIN_ST_INTERNAL_8hi,
+  ALTIVEC_BUILTIN_LD_INTERNAL_8hi,
+  ALTIVEC_BUILTIN_ST_INTERNAL_16qi,
+  ALTIVEC_BUILTIN_LD_INTERNAL_16qi,
+  ALTIVEC_BUILTIN_ST_INTERNAL_4sf,
+  ALTIVEC_BUILTIN_LD_INTERNAL_4sf,
   ALTIVEC_BUILTIN_VADDUBM,
   ALTIVEC_BUILTIN_VADDUHM,
   ALTIVEC_BUILTIN_VADDUWM,
@@ -2936,8 +2944,8 @@ enum rs6000_builtins
   ALTIVEC_BUILTIN_VSL,
   ALTIVEC_BUILTIN_VSLO,
   ALTIVEC_BUILTIN_VSRB,
-  ALTIVEC_BUILTIN_VRSH,
-  ALTIVEC_BUILTIN_VRSW,
+  ALTIVEC_BUILTIN_VSRH,
+  ALTIVEC_BUILTIN_VSRW,
   ALTIVEC_BUILTIN_VSRAB,
   ALTIVEC_BUILTIN_VSRAH,
   ALTIVEC_BUILTIN_VSRAW,

gcc/config/rs6000/sysv4.h

@@ -1316,6 +1316,7 @@ ncrtn.o%s"
 %{mcpu=604e: -DCPU=PPC604} \
 %{mcpu=620: -DCPU=PPC604} \
 %{mcpu=740: -DCPU=PPC603} \
+%{mcpu=7450: -DCPU=PPC603} \
 %{mcpu=750: -DCPU=PPC603} \
 %{mcpu=801: -DCPU=PPC603} \
 %{mcpu=821: -DCPU=PPC603} \

gcc/testsuite/gcc.dg/altivec-1.c

@@ -9,10 +9,10 @@
    overloaded functions implemented in an <altivec.h>.  */
 
 #define vec_load(src) \
-  __builtin_altivec_ld_internal ((int *) src)
+  __builtin_altivec_ld_internal_4si ((int *) src)
 
 #define vec_store(dst, src) \
-  __builtin_altivec_st_internal ((int *) dst, (int4) src)
+  __builtin_altivec_st_internal_4si ((int *) dst, (int4) src)
 
 #define vec_add_int4(x, y) \
   __builtin_altivec_vaddsws (x, y)