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riscv-gcc-1
Commit f0c1ebb7 by Joseph Myers Committed by Joseph Myers
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arm.h (FUNCTION_ARG_ADVANCE): Only adjust iwmmxt_nregs if TARGET_IWMMXT_ABI. 

	* config/arm/arm.h (FUNCTION_ARG_ADVANCE): Only adjust
	iwmmxt_nregs if TARGET_IWMMXT_ABI.
	* config/arm/iwmmxt.md (movv8qi_internal, movv4hi_internal,
	movv2si_internal): Support moves between core registers.

From-SVN: r118825
parent dd7f7a6e
Showing with 31 additions and 20 deletions
gcc/ChangeLog
2006-11-14 Joseph Myers <joseph@codesourcery.com>
* config/arm/arm.h (FUNCTION_ARG_ADVANCE): Only adjust
iwmmxt_nregs if TARGET_IWMMXT_ABI.
* config/arm/iwmmxt.md (movv8qi_internal, movv4hi_internal,
movv2si_internal): Support moves between core registers.
2006-11-14 Eric Christopher <echristo@apple.com>
* configure: Regenerate with autoconf 2.59.
......
gcc/config/arm/arm.h
......@@ -1480,8 +1480,9 @@ typedef struct
(TYPE is null for libcalls where that information may not be available.) */
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
(CUM).nargs += 1; \
if (arm_vector_mode_supported_p (MODE) \
&& (CUM).named_count > (CUM).nargs) \
if (arm_vector_mode_supported_p (MODE) \
&& (CUM).named_count > (CUM).nargs \
&& TARGET_IWMMXT_ABI) \
(CUM).iwmmxt_nregs += 1; \
else \
(CUM).nregs += ARM_NUM_REGS2 (MODE, TYPE)
......
gcc/config/arm/iwmmxt.md
......@@ -158,8 +158,8 @@
)
(define_insn "movv8qi_internal"
[(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,m,y,?r,?y,?r")
(match_operand:V8QI 1 "general_operand" "y,y,mi,y,r,mi"))]
[(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,m,y,?r,?y,?r,?r")
(match_operand:V8QI 1 "general_operand" "y,y,mi,y,r,r,mi"))]
"TARGET_REALLY_IWMMXT"
"*
switch (which_alternative)
......@@ -169,17 +169,18 @@
case 2: return \"wldrd%?\\t%0, %1\";
case 3: return \"tmrrc%?\\t%Q0, %R0, %1\";
case 4: return \"tmcrr%?\\t%0, %Q1, %R1\";
case 5: return \"#\";
default: return output_move_double (operands);
}"
[(set_attr "predicable" "yes")
(set_attr "length" "4, 4, 4,4,4, 8")
(set_attr "type" "*,store1,load1,*,*,load1")
(set_attr "pool_range" "*, *, 256,*,*, 256")
(set_attr "neg_pool_range" "*, *, 244,*,*, 244")])
(set_attr "length" "4, 4, 4,4,4,8, 8")
(set_attr "type" "*,store1,load1,*,*,*,load1")
(set_attr "pool_range" "*, *, 256,*,*,*, 256")
(set_attr "neg_pool_range" "*, *, 244,*,*,*, 244")])
(define_insn "movv4hi_internal"
[(set (match_operand:V4HI 0 "nonimmediate_operand" "=y,m,y,?r,?y,?r")
(match_operand:V4HI 1 "general_operand" "y,y,mi,y,r,mi"))]
[(set (match_operand:V4HI 0 "nonimmediate_operand" "=y,m,y,?r,?y,?r,?r")
(match_operand:V4HI 1 "general_operand" "y,y,mi,y,r,r,mi"))]
"TARGET_REALLY_IWMMXT"
"*
switch (which_alternative)
......@@ -189,17 +190,18 @@
case 2: return \"wldrd%?\\t%0, %1\";
case 3: return \"tmrrc%?\\t%Q0, %R0, %1\";
case 4: return \"tmcrr%?\\t%0, %Q1, %R1\";
case 5: return \"#\";
default: return output_move_double (operands);
}"
[(set_attr "predicable" "yes")
(set_attr "length" "4, 4, 4,4,4, 8")
(set_attr "type" "*,store1,load1,*,*,load1")
(set_attr "pool_range" "*, *, 256,*,*, 256")
(set_attr "neg_pool_range" "*, *, 244,*,*, 244")])
(set_attr "length" "4, 4, 4,4,4,8, 8")
(set_attr "type" "*,store1,load1,*,*,*,load1")
(set_attr "pool_range" "*, *, 256,*,*,*, 256")
(set_attr "neg_pool_range" "*, *, 244,*,*,*, 244")])
(define_insn "movv2si_internal"
[(set (match_operand:V2SI 0 "nonimmediate_operand" "=y,m,y,?r,?y,?r")
(match_operand:V2SI 1 "general_operand" "y,y,mi,y,r,mi"))]
[(set (match_operand:V2SI 0 "nonimmediate_operand" "=y,m,y,?r,?y,?r,?r")
(match_operand:V2SI 1 "general_operand" "y,y,mi,y,r,r,mi"))]
"TARGET_REALLY_IWMMXT"
"*
switch (which_alternative)
......@@ -209,13 +211,14 @@
case 2: return \"wldrd%?\\t%0, %1\";
case 3: return \"tmrrc%?\\t%Q0, %R0, %1\";
case 4: return \"tmcrr%?\\t%0, %Q1, %R1\";
case 5: return \"#\";
default: return output_move_double (operands);
}"
[(set_attr "predicable" "yes")
(set_attr "length" "4, 4, 4,4,4, 24")
(set_attr "type" "*,store1,load1,*,*,load1")
(set_attr "pool_range" "*, *, 256,*,*, 256")
(set_attr "neg_pool_range" "*, *, 244,*,*, 244")])
(set_attr "length" "4, 4, 4,4,4,8, 24")
(set_attr "type" "*,store1,load1,*,*,*,load1")
(set_attr "pool_range" "*, *, 256,*,*,*, 256")
(set_attr "neg_pool_range" "*, *, 244,*,*,*, 244")])
;; This pattern should not be needed. It is to match a
;; wierd case generated by GCC when no optimizations are
......
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