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lvzhengyang
riscv-gcc-1
Commits
efc08378
Commit
efc08378
authored
Feb 19, 1996
by
David Edelsohn
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update movdf and movsf splits for 64-bits
From-SVN: r11310
parent
042259f2
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gcc/config/rs6000/rs6000.md
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gcc/config/rs6000/rs6000.md
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efc08378
...
...
@@ -5102,10 +5102,8 @@
[
(set (match_operand:SF 0 "gpc_reg_operand" "")
(match_operand:SF 1 "easy_fp_constant" ""))]
"reload_completed && REGNO (operands
[
0
]
) <= 31"
[
(set (match_dup 2) (match_dup 3))
]
"
{ operands
[
2
]
= operand_subword (operands
[
0
]
, 0, 0, SFmode);
operands
[
3
]
= operand_subword (operands
[
1
]
, 0, 0, SFmode); }")
[
(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))
]
""
(define_insn ""
[
(set (match_operand:SF 0 "fp_reg_or_mem_operand" "=f,f,m")
...
...
@@ -5172,7 +5170,7 @@
(define_split
[
(set (match_operand:DF 0 "gpc_reg_operand" "")
(match_operand:DF 1 "easy_fp_constant" ""))]
"reload_completed && REGNO (operands
[
0
]
) <= 31"
"
TARGET_32BIT &&
reload_completed && REGNO (operands
[
0
]
) <= 31"
[
(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
"
...
...
@@ -5181,6 +5179,13 @@
operands
[
4
]
= operand_subword (operands
[
0
]
, 1, 0, DFmode);
operands
[
5
]
= operand_subword (operands
[
1
]
, 1, 0, DFmode); }")
(define_split
[
(set (match_operand:DF 0 "gpc_reg_operand" "")
(match_operand:DF 1 "easy_fp_constant" ""))]
"TARGET_64BIT && reload_completed && REGNO (operands
[
0
]
) <= 31"
[
(set (subreg:DI (match_dup 0) 0) (subreg:DI (match_dup 1) 0))
]
"")
;; Don't have reload use general registers to load a constant. First,
;; it might not work if the output operand has is the equivalent of
;; a non-offsettable memref, but also it is less efficient than loading
...
...
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