Commit efc05e3c by Peter Bergner Committed by Peter Bergner

re PR target/35373 (bootstraping on powerpc with 128bit long double fails with revision 132578)

	PR target/35373
	* config/rs6000/rs6000.c (rs6000_legitimize_address): Don't generate
	reg+const addressing for Altivec modes.  Don't generate reg+reg
	addressing for TFmode or TDmode quantities.

From-SVN: r133008
parent 96d84882
2008-03-07 Peter Bergner <bergner@vnet.ibm.com>
PR target/35373
* config/rs6000/rs6000.c (rs6000_legitimize_address): Don't generate
reg+const addressing for Altivec modes. Don't generate reg+reg
addressing for TFmode or TDmode quantities.
2008-03-07 Paolo Bonzini <bonzini@gnu.org> 2008-03-07 Paolo Bonzini <bonzini@gnu.org>
* c-common.c (vector_types_convertible_p): Call langhook * c-common.c (vector_types_convertible_p): Call langhook
......
...@@ -3615,6 +3615,7 @@ rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -3615,6 +3615,7 @@ rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
&& GET_CODE (XEXP (x, 1)) == CONST_INT && GET_CODE (XEXP (x, 1)) == CONST_INT
&& (unsigned HOST_WIDE_INT) (INTVAL (XEXP (x, 1)) + 0x8000) >= 0x10000 && (unsigned HOST_WIDE_INT) (INTVAL (XEXP (x, 1)) + 0x8000) >= 0x10000
&& !(SPE_VECTOR_MODE (mode) && !(SPE_VECTOR_MODE (mode)
|| ALTIVEC_VECTOR_MODE (mode)
|| (TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode || (TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode
|| mode == DImode)))) || mode == DImode))))
{ {
...@@ -3632,11 +3633,12 @@ rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -3632,11 +3633,12 @@ rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
&& GET_MODE_NUNITS (mode) == 1 && GET_MODE_NUNITS (mode) == 1
&& ((TARGET_HARD_FLOAT && TARGET_FPRS) && ((TARGET_HARD_FLOAT && TARGET_FPRS)
|| TARGET_POWERPC64 || TARGET_POWERPC64
|| (((mode != DImode && mode != DFmode && mode != DDmode) || ((mode != DImode && mode != DFmode && mode != DDmode)
|| TARGET_E500_DOUBLE) || TARGET_E500_DOUBLE))
&& mode != TFmode && mode != TDmode))
&& (TARGET_POWERPC64 || mode != DImode) && (TARGET_POWERPC64 || mode != DImode)
&& mode != TImode) && mode != TImode
&& mode != TFmode
&& mode != TDmode)
{ {
return gen_rtx_PLUS (Pmode, XEXP (x, 0), return gen_rtx_PLUS (Pmode, XEXP (x, 0),
force_reg (Pmode, force_operand (XEXP (x, 1), 0))); force_reg (Pmode, force_operand (XEXP (x, 1), 0)));
......
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