re PR target/28909 (Missed optimization with x86 sync builtins)

        PR target/28909
        * config/i386/sync.md ("sync_add<mode>", "sync_sub<mode>"):
        Use inc and dec instructions for TARGET_USE_INCDEC.
        ("*sync_compare_and_swap<mode>"): Fix -masm=intel template.
        ("sync_double_compare_and_swap<mode>"): Likewise.
        ("*sync_double_compare_and_swapdi_pic"): Likewise.
        ("*sync_compare_and_swap_cc<mode>"): Likewise.
        ("sync_double_compare_and_swap_cc<mode>"): Likewise.
        ("*sync_double_compare_and_swap_ccdi_pic"): Likewise.
        ("sync_old_add<mode>"): Likewise.
        ("sync_lock_test_and_set<mode>"): Likewise.
        ("sync_lock_test_and_set<mode>"): Likewise.
        ("sync_add<mode>"): Likewise.
        ("sync_sub<mode>"): Likewise.
        ("sync_ior<mode>"): Likewise.
        ("sync_and<mode>"): Likewise.
        ("sync_xor<mode>"): Likewise.

From-SVN: r118028

gcc/ChangeLog

 2006-10-25  Uros Bizjak  <uros@kss-loka.si>
 
+	PR target/28909
+	* config/i386/sync.md ("sync_add<mode>", "sync_sub<mode>"):
+	Use inc and dec instructions for TARGET_USE_INCDEC.
+	("*sync_compare_and_swap<mode>"): Fix -masm=intel template.
+	("sync_double_compare_and_swap<mode>"): Likewise.
+	("*sync_double_compare_and_swapdi_pic"): Likewise.
+	("*sync_compare_and_swap_cc<mode>"): Likewise.
+	("sync_double_compare_and_swap_cc<mode>"): Likewise.
+	("*sync_double_compare_and_swap_ccdi_pic"): Likewise.
+	("sync_old_add<mode>"): Likewise.
+	("sync_lock_test_and_set<mode>"): Likewise.
+	("sync_lock_test_and_set<mode>"): Likewise.
+	("sync_add<mode>"): Likewise.
+	("sync_sub<mode>"): Likewise.
+	("sync_ior<mode>"): Likewise.
+	("sync_and<mode>"): Likewise.
+	("sync_xor<mode>"): Likewise.
+
+2006-10-25  Uros Bizjak  <uros@kss-loka.si>
+
 	* optabs.h (enum optab_index): Rename OTI_drem to OTI_remainder.
 	(remainder_optab): Define corresponding macro.
 	(drem_optab): Remove.

gcc/config/i386/sync.md

@@ -82,7 +82,7 @@
 	  UNSPECV_CMPXCHG_1))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_CMPXCHG"
-  "lock\;cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
+  "lock{\;| }cmpxchg{<modesuffix>\t%3, %1| %1, %3}")
 
 (define_insn "sync_double_compare_and_swap<mode>"
   [(set (match_operand:DCASMODE 0 "register_operand" "=A")
@@ -96,7 +96,7 @@
 	  UNSPECV_CMPXCHG_1))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock\;cmpxchg<doublemodesuffix>b\t%1")
+  "lock{\;| }cmpxchg<doublemodesuffix>b{\t| }%1")
 
 (define_insn "*sync_double_compare_and_swapdi_pic"
   [(set (match_operand:DI 0 "register_operand" "=A")
@@ -110,7 +110,7 @@
 	  UNSPECV_CMPXCHG_1))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
-  "xchg{l}\t%%ebx, %3\;lock\;cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
+  "xchg{l}\t%%ebx, %3\;lock{\;| }cmpxchg8b{\t| }%1\;xchg{l}\t%%ebx, %3")
 
 (define_expand "sync_compare_and_swap_cc<mode>"
   [(parallel
@@ -168,7 +168,7 @@
 	    [(match_dup 1) (match_dup 2) (match_dup 3)] UNSPECV_CMPXCHG_2)
 	  (match_dup 2)))]
   "TARGET_CMPXCHG"
-  "lock\;cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
+  "lock{\;| }cmpxchg{<modesuffix>\t%3, %1| %1, %3}")
 
 (define_insn "sync_double_compare_and_swap_cc<mode>"
   [(set (match_operand:DCASMODE 0 "register_operand" "=A")
@@ -187,7 +187,7 @@
 	    UNSPECV_CMPXCHG_2)
 	  (match_dup 2)))]
   ""
-  "lock\;cmpxchg<doublemodesuffix>b\t%1")
+  "lock{\;| }cmpxchg<doublemodesuffix>b{\t| }%1")
 
 (define_insn "*sync_double_compare_and_swap_ccdi_pic"
   [(set (match_operand:DI 0 "register_operand" "=A")
@@ -206,7 +206,7 @@
 	    UNSPECV_CMPXCHG_2)
 	  (match_dup 2)))]
   "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
-  "xchg{l}\t%%ebx, %3\;lock\;cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
+  "xchg{l}\t%%ebx, %3\;lock{\;| }cmpxchg8b{\t| }%1\;xchg{l}\t%%ebx, %3")
 
 (define_insn "sync_old_add<mode>"
   [(set (match_operand:IMODE 0 "register_operand" "=<modeconstraint>")
@@ -217,7 +217,7 @@
 		    (match_operand:IMODE 2 "register_operand" "0")))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_XADD"
-  "lock\;xadd{<modesuffix>}\t{%0, %1|%1, %0}")
+  "lock{\;| }xadd{<modesuffix>\t%0, %1| %1, %0}")
 
 ;; Recall that xchg implicitly sets LOCK#, so adding it again wastes space.
 (define_insn "sync_lock_test_and_set<mode>"
@@ -237,7 +237,17 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock\;add{<modesuffix>}\t{%1, %0|%0, %1}")
+{
+  if (TARGET_USE_INCDEC)
+    {
+      if (operands[1] == const1_rtx)
+	return "lock{\;| }inc{<modesuffix>\t| }%0";
+      if (operands[1] == constm1_rtx)
+	return "lock{\;| }dec{<modesuffix>\t| }%0";
+    }
+
+  return "lock{\;| }add{<modesuffix>\t%1, %0| %0, %1}";
+})
 
 (define_insn "sync_sub<mode>"
   [(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -247,7 +257,17 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock\;sub{<modesuffix>}\t{%1, %0|%0, %1}")
+{
+  if (TARGET_USE_INCDEC)
+    {
+      if (operands[1] == const1_rtx)
+	return "lock{\;| }dec{<modesuffix>\t| }%0";
+      if (operands[1] == constm1_rtx)
+	return "lock{\;| }inc{<modesuffix>\t| }%0";
+    }
+
+  return "lock{\;| }sub{<modesuffix>\t%1, %0| %0, %1}";
+})
 
 (define_insn "sync_ior<mode>"
   [(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -257,7 +277,7 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock\;or{<modesuffix>}\t{%1, %0|%0, %1}")
+  "lock{\;| }or{<modesuffix>\t%1, %0| %0, %1}")
 
 (define_insn "sync_and<mode>"
   [(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -267,7 +287,7 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock\;and{<modesuffix>}\t{%1, %0|%0, %1}")
+  "lock{\;| }and{<modesuffix>\t%1, %0| %0, %1}")
 
 (define_insn "sync_xor<mode>"
   [(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -277,4 +297,4 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock\;xor{<modesuffix>}\t{%1, %0|%0, %1}")
+  "lock{\;| }xor{<modesuffix>\t%1, %0| %0, %1}")