Commit ef78aed6 by Anatoly Sokolov Committed by Anatoly Sokolov

mips.h (PREFERRED_RELOAD_CLASS): Remove macro.

	* config/mips/mips.h (PREFERRED_RELOAD_CLASS): Remove macro.
	* config/mips/mips-protos.h (mips_preferred_reload_class): Remove.
	* config/mips/mips.c (mips_preferred_reload_class): Make static.
	Change 'rclass' argument and result type to reg_class_t.
	(TARGET_PREFERRED_RELOAD_CLASS): Define.

From-SVN: r170789
parent 5f892aa0
2011-03-08 Anatoly Sokolov <aesok@post.ru>
* config/mips/mips.h (PREFERRED_RELOAD_CLASS): Remove macro.
* config/mips/mips-protos.h (mips_preferred_reload_class): Remove.
* config/mips/mips.c (mips_preferred_reload_class): Make static.
Change 'rclass' argument and result type to reg_class_t.
(TARGET_PREFERRED_RELOAD_CLASS): Define.
2011-03-08 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr.h (REGISTER_MOVE_COST, MEMORY_MOVE_COST): Remove.
......
/* Prototypes of target machine for GNU compiler. MIPS version.
Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
1999, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
Free Software Foundation, Inc.
Contributed by A. Lichnewsky (lich@inria.inria.fr).
Changed by Michael Meissner (meissner@osf.org).
......@@ -283,7 +283,6 @@ extern bool mips_cannot_change_mode_class (enum machine_mode,
enum machine_mode, enum reg_class);
extern bool mips_dangerous_for_la25_p (rtx);
extern bool mips_modes_tieable_p (enum machine_mode, enum machine_mode);
extern enum reg_class mips_preferred_reload_class (rtx, enum reg_class);
extern enum reg_class mips_secondary_reload_class (enum reg_class,
enum machine_mode,
rtx, bool);
......
/* Subroutines used for MIPS code generation.
Copyright (C) 1989, 1990, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
2011
Free Software Foundation, Inc.
Contributed by A. Lichnewsky, lich@inria.inria.fr.
Changes by Michael Meissner, meissner@osf.org.
......@@ -10804,10 +10805,10 @@ mips_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
&& !mips_mode_ok_for_mov_fmt_p (mode2)));
}
/* Implement PREFERRED_RELOAD_CLASS. */
/* Implement TARGET_PREFERRED_RELOAD_CLASS. */
enum reg_class
mips_preferred_reload_class (rtx x, enum reg_class rclass)
static reg_class_t
mips_preferred_reload_class (rtx x, reg_class_t rclass)
{
if (mips_dangerous_for_la25_p (x) && reg_class_subset_p (LEA_REGS, rclass))
return LEA_REGS;
......@@ -16487,6 +16488,9 @@ mips_shift_truncation_mask (enum machine_mode mode)
#undef TARGET_MACHINE_DEPENDENT_REORG
#define TARGET_MACHINE_DEPENDENT_REORG mips_reorg
#undef TARGET_PREFERRED_RELOAD_CLASS
#define TARGET_PREFERRED_RELOAD_CLASS mips_preferred_reload_class
#undef TARGET_ASM_FILE_START
#define TARGET_ASM_FILE_START mips_file_start
#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
......
......@@ -2028,9 +2028,6 @@ enum reg_class
#define SMALL_INT_UNSIGNED(X) SMALL_OPERAND_UNSIGNED (INTVAL (X))
#define LUI_INT(X) LUI_OPERAND (INTVAL (X))
#define PREFERRED_RELOAD_CLASS(X,CLASS) \
mips_preferred_reload_class (X, CLASS)
/* The HI and LO registers can only be reloaded via the general
registers. Condition code registers can only be loaded to the
general registers, and from the floating point registers. */
......
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