re PR bootstrap/49104 (bootstrap failure on AMD K6-2 with illegal instruction (cmove) in stage2)

	PR target/49104
	* config/i386/cpuid.h (bit_MMXEXT): New define.

libcpp/ChangeLog:

2011-05-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/49104
	* lex.c (init_vectorized_lexer): Do not set "minimum" when __3dNOW_A__
	is defined.  Check bit_MMXEXT and bit_CMOV to use search_line_mmx.

From-SVN: r174032

gcc/ChangeLog

+2011-05-22  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/49104
+	* config/i386/cpuid.h (bit_MMXEXT): New define.
+
 2011-05-22  Nick Clifton  <nickc@redhat.com>
 
 	* config/stormy16/stormy16.c (xstormy16_init_builtins): prevent
@@ -7,8 +12,7 @@
 2011-05-22  Ira Rosen  <ira.rosen@linaro.org>
 
 	PR tree-optimization/49087
-	* tree-vect-loop.c (vect_is_slp_reduction): Fail if
-	LHS has no uses.
+	* tree-vect-loop.c (vect_is_slp_reduction): Fail if LHS has no uses.
 
 2011-05-21  Jason Merrill  <jason@redhat.com>
 
@@ -45,8 +49,7 @@
 	* opt-read.awk: New.  Split out of optc-gen.awk and opth-gen.awk.
 	* optc-gen.awk: Move common code to opt-read.awk.
 	* opth-gen.awk: Likewise.
-	* Makefile.in (options.c, s-options-h): Update to use
-	opt-read.awk.
+	* Makefile.in (options.c, s-options-h): Update to use opt-read.awk.
 
 2011-05-20  Nathan Froyd  <froydnj@codesourcery.com>
 

gcc/config/i386/cpuid.h

@@ -57,6 +57,7 @@
 #define bit_TBM         (1 << 21)
 
 /* %edx */
+#define bit_MMXEXT	(1 << 22)
 #define bit_LM		(1 << 29)
 #define bit_3DNOWP	(1 << 30)
 #define bit_3DNOW	(1 << 31)

libcpp/ChangeLog

+2011-05-22  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/49104
+	* lex.c (init_vectorized_lexer): Do not set "minimum" when __3dNOW_A__
+	is defined.  Check bit_MMXEXT and bit_CMOV to use search_line_mmx.
+
 2011-04-25  Jan Kratochvil  <jan.kratochvil@redhat.com>
 
 	* system.h (ENUM_BITFIELD): Remove.

libcpp/lex.c

@@ -294,7 +294,7 @@ static const char repl_chars[4][16] __attribute__((aligned(16))) = {
 /* A version of the fast scanner using MMX vectorized byte compare insns.
 
    This uses the PMOVMSKB instruction which was introduced with "MMX2",
-   which was packaged into SSE1; it is also present in the AMD 3dNOW-A
+   which was packaged into SSE1; it is also present in the AMD MMX
    extension.  Mark the function as using "sse" so that we emit a real
    "emms" instruction, rather than the 3dNOW "femms" instruction.  */
 
@@ -488,7 +488,7 @@ init_vectorized_lexer (void)
   minimum = 3;
 #elif defined(__SSE2__)
   minimum = 2;
-#elif defined(__SSE__) || defined(__3dNOW_A__)
+#elif defined(__SSE__)
   minimum = 1;
 #endif
 
@@ -505,7 +505,7 @@ init_vectorized_lexer (void)
     }
   else if (__get_cpuid (0x80000001, &dummy, &dummy, &dummy, &edx))
     {
-      if (minimum == 1 || edx & bit_3DNOWP)
+      if (minimum == 1 || (edx & (bit_MMXEXT | bit_CMOV)))
 	impl = search_line_mmx;
     }