Commit ee6824ae by Ramana Radhakrishnan Committed by Ramana Radhakrishnan

re PR target/47930 (-marm is undocumented; driver accepts -mno-thumb)


2011-05-06  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

      PR target/47930
      * config/arm/arm.opt (marm): Document it.
      (mthumb): Reject negative variant.

From-SVN: r173481
parent e7385332
2011-05-06 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
PR target/47930
* config/arm/arm.opt (marm): Document it.
(mthumb): Reject negative variant.
2011-05-06 Uros Bizjak <ubizjak@gmail.com> 2011-05-06 Uros Bizjak <ubizjak@gmail.com>
PR target/48898 PR target/48898
......
...@@ -52,7 +52,8 @@ Target RejectNegative Joined Enum(arm_arch) Var(arm_arch_option) ...@@ -52,7 +52,8 @@ Target RejectNegative Joined Enum(arm_arch) Var(arm_arch_option)
Specify the name of the target architecture Specify the name of the target architecture
marm marm
Target RejectNegative InverseMask(THUMB) Undocumented Target Report RejectNegative InverseMask(THUMB)
Generate code in 32 bit ARM state.
mbig-endian mbig-endian
Target Report RejectNegative Mask(BIG_END) Target Report RejectNegative Mask(BIG_END)
...@@ -131,8 +132,8 @@ Target RejectNegative Joined Var(structure_size_string) ...@@ -131,8 +132,8 @@ Target RejectNegative Joined Var(structure_size_string)
Specify the minimum bit alignment of structures Specify the minimum bit alignment of structures
mthumb mthumb
Target Report Mask(THUMB) Target Report RejectNegative Mask(THUMB)
Compile for the Thumb not the ARM Generate code for Thumb state
mthumb-interwork mthumb-interwork
Target Report Mask(INTERWORK) Target Report Mask(INTERWORK)
......
...@@ -10282,15 +10282,15 @@ there is a function name embedded immediately preceding this location ...@@ -10282,15 +10282,15 @@ there is a function name embedded immediately preceding this location
and has length @code{((pc[-3]) & 0xff000000)}. and has length @code{((pc[-3]) & 0xff000000)}.
@item -mthumb @item -mthumb
@itemx -marm
@opindex marm
@opindex mthumb @opindex mthumb
Generate code for the Thumb instruction set. The default is to
use the 32-bit ARM instruction set. Select between generating code that executes in ARM and Thumb
This option automatically enables either 16-bit Thumb-1 or states. The default for most configurations is to generate code
mixed 16/32-bit Thumb-2 instructions based on the @option{-mcpu=@var{name}} that executes in ARM state, but the default can be changed by
and @option{-march=@var{name}} options. This option is not passed to the configuring GCC with the @option{--with-mode=}@var{state}
assembler. If you want to force assembler files to be interpreted as Thumb code, configure option.
either add a @samp{.thumb} directive to the source or pass the @option{-mthumb}
option directly to the assembler by prefixing it with @option{-Wa}.
@item -mtpcs-frame @item -mtpcs-frame
@opindex mtpcs-frame @opindex mtpcs-frame
......
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