Commit ee62e302 by Bill Schmidt Committed by William Schmidt

rs6000-builtin.def (commentary): Typo.

2016-06-14  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000-builtin.def (commentary): Typo.
	(BU_P9_MISC_1): Likewise.
	(BU_P9_64BIT_MISC_0): Likewise.
	(BU_P9_MISC_0): Likewise.

From-SVN: r237465
parent 6e433d0b
2016-06-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (commentary): Typo.
(BU_P9_MISC_1): Likewise.
(BU_P9_64BIT_MISC_0): Likewise.
(BU_P9_MISC_0): Likewise.
2016-06-14 David Malcolm <dmalcolm@redhat.com>
* gcc-rich-location.c
......
......@@ -42,7 +42,7 @@
NAME String literal for the name
MASK Mask of bits that indicate which options enables the builtin
ATTR builtin attribute information.
ICODE Insn code of the function that implents the builtin. */
ICODE Insn code of the function that implements the builtin. */
#ifndef RS6000_BUILTIN_0
#error "RS6000_BUILTIN_0 is not defined."
......@@ -642,41 +642,6 @@
| RS6000_BTC_TERNARY), \
CODE_FOR_ ## ICODE) /* ICODE */
/* Miscellaneous builtins for instructions added in ISA 3.0. These
instructions don't require either the DFP or VSX options, just the basic
ISA 3.0 enablement since they operate on general purpose registers. */
#define BU_P9_MISC_1(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
"__builtin_" NAME, /* NAME */ \
RS6000_BTM_MODULO, /* MASK */ \
(RS6000_BTC_ ## ATTR /* ATTR */ \
| RS6000_BTC_UNARY), \
CODE_FOR_ ## ICODE) /* ICODE */
/* Miscellaneous builtins for instructions added in ISA 3.0. These
instructions don't require either the DFP or VSX options, just the basic
ISA 3.0 enablement since they operate on general purpose registers,
and they require 64-bit addressing. */
#define BU_P9_64BIT_MISC_0(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
"__builtin_" NAME, /* NAME */ \
RS6000_BTM_MODULO \
| RS6000_BTM_64BIT, /* MASK */ \
(RS6000_BTC_ ## ATTR /* ATTR */ \
| RS6000_BTC_SPECIAL), \
CODE_FOR_ ## ICODE) /* ICODE */
/* Miscellaneous builtins for instructions added in ISA 3.0. These
instructions don't require either the DFP or VSX options, just the basic
ISA 3.0 enablement since they operate on general purpose registers. */
#define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
"__builtin_" NAME, /* NAME */ \
RS6000_BTM_MODULO, /* MASK */ \
(RS6000_BTC_ ## ATTR /* ATTR */ \
| RS6000_BTC_SPECIAL), \
CODE_FOR_ ## ICODE) /* ICODE */
/* 128-bit long double floating point builtins. */
#define BU_LDBL128_2(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
......
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