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Commit ede23272 by Alex Velenko Committed by Marcus Shawcroft
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[AArch64] Disable vec_perm patterns for aarch64_be. 

From-SVN: r206851
parent 201b7ecd
Showing with 18 additions and 4 deletions
gcc/ChangeLog
2014-01-20 Alex Velenko <Alex.Velenko@arm.com>
* config/aarch64/aarch64-simd.md (vec_perm<mode>): Add BE check.
2014-01-20 Jakub Jelinek <jakub@redhat.com> 2014-01-20 Jakub Jelinek <jakub@redhat.com>
PR middle-end/59860 PR middle-end/59860
......
gcc/config/aarch64/aarch64-simd.md
...@@ -3840,7 +3840,7 @@ ...@@ -3840,7 +3840,7 @@
(match_operand:VB 1 "register_operand") (match_operand:VB 1 "register_operand")
(match_operand:VB 2 "register_operand") (match_operand:VB 2 "register_operand")
(match_operand:VB 3 "register_operand")] (match_operand:VB 3 "register_operand")]
"TARGET_SIMD" "TARGET_SIMD && !BYTES_BIG_ENDIAN"
{ {
aarch64_expand_vec_perm (operands[0], operands[1], aarch64_expand_vec_perm (operands[0], operands[1],
operands[2], operands[3]); operands[2], operands[3]);
......
gcc/testsuite/ChangeLog
2014-01-20 Alex Velenko <Alex.Velenko@arm.com>
* lib/target-supports.exp
(check_effective_target_vect_perm): Exclude aarch64_be.
(check_effective_target_vect_perm_byte): Likewise.
(check_effective_target_vect_perm_short): Likewise.
2013-01-20 Alex Velenko <Alex.Velenko@arm.com> 2013-01-20 Alex Velenko <Alex.Velenko@arm.com>
* gcc.target/aarch64/vneg_f.c (STORE_INST): New macro. * gcc.target/aarch64/vneg_f.c (STORE_INST): New macro.
......
gcc/testsuite/lib/target-supports.exp
...@@ -3440,7 +3440,8 @@ proc check_effective_target_vect_perm { } { ...@@ -3440,7 +3440,8 @@ proc check_effective_target_vect_perm { } {
} else { } else {
set et_vect_perm_saved 0 set et_vect_perm_saved 0
if { [is-effective-target arm_neon_ok] if { [is-effective-target arm_neon_ok]
|| [istarget aarch64*-*-*] || ([istarget aarch64*-*-*]
&& [is-effective-target aarch64_little_endian])
|| [istarget powerpc*-*-*] || [istarget powerpc*-*-*]
|| [istarget spu-*-*] || [istarget spu-*-*]
|| [istarget i?86-*-*] || [istarget i?86-*-*]
...@@ -3468,7 +3469,8 @@ proc check_effective_target_vect_perm_byte { } { ...@@ -3468,7 +3469,8 @@ proc check_effective_target_vect_perm_byte { } {
set et_vect_perm_byte_saved 0 set et_vect_perm_byte_saved 0
if { ([is-effective-target arm_neon_ok] if { ([is-effective-target arm_neon_ok]
&& [is-effective-target arm_little_endian]) && [is-effective-target arm_little_endian])
|| [istarget aarch64*-*-*] || ([istarget aarch64*-*-*]
&& [is-effective-target aarch64_little_endian])
|| [istarget powerpc*-*-*] || [istarget powerpc*-*-*]
|| [istarget spu-*-*] } { || [istarget spu-*-*] } {
set et_vect_perm_byte_saved 1 set et_vect_perm_byte_saved 1
...@@ -3492,7 +3494,8 @@ proc check_effective_target_vect_perm_short { } { ...@@ -3492,7 +3494,8 @@ proc check_effective_target_vect_perm_short { } {
set et_vect_perm_short_saved 0 set et_vect_perm_short_saved 0
if { ([is-effective-target arm_neon_ok] if { ([is-effective-target arm_neon_ok]
&& [is-effective-target arm_little_endian]) && [is-effective-target arm_little_endian])
|| [istarget aarch64*-*-*] || ([istarget aarch64*-*-*]
&& [is-effective-target aarch64_little_endian])
|| [istarget powerpc*-*-*] || [istarget powerpc*-*-*]
|| [istarget spu-*-*] } { || [istarget spu-*-*] } {
set et_vect_perm_short_saved 1 set et_vect_perm_short_saved 1
......
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