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lvzhengyang
riscv-gcc-1
Commits
edc62122
Commit
edc62122
authored
Mar 14, 2004
by
Richard Earnshaw
Committed by
Richard Earnshaw
Mar 14, 2004
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* arm.h (EXTRA_CONSTRAINT_STR_ARM): Update comment.
From-SVN: r79468
parent
db4397e7
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gcc/ChangeLog
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edc62122
2004-03-14 Richard Earnshaw <rearnsha@arm.com>
* arm.h (EXTRA_CONSTRAINT_STR_ARM): Update comment.
2004-03-13 Dara Hazeghi <dhazeghi@yahoo.com>
* doc/install.texi: Note status of -fnew-ra.
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gcc/config/arm/arm.h
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edc62122
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@@ -1469,7 +1469,9 @@ enum reg_class
`S' means any symbol that has the SYMBOL_REF_FLAG set or a CONSTANT_POOL
address. This means that the symbol is in the text segment and can be
accessed without using a load.
'U' is an address valid for VFP load/store insns. */
'U' Prefixes an extended memory constraint where:
'Uv' is an address valid for VFP load/store insns.
'Uq' is an address valid for ldrsb. */
#define EXTRA_CONSTRAINT_STR_ARM(OP, C, STR) \
(((C) == 'Q') ? (GET_CODE (OP) == MEM \
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