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Commit ec0c1fab by Michael Meissner Committed by Michael Meissner
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rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't generate the XXBRD instruction. 

2017-11-14  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't
	generate the XXBRD instruction.

From-SVN: r254742
parent cdb4b7aa
Showing with 3 additions and 6 deletions
gcc/ChangeLog
2017-11-14 Michael Meissner <meissner@linux.vnet.ibm.com> 2017-11-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't
generate the XXBRD instruction.
* config/rs6000/rs6000-c.c (is_float128_p): New helper function. * config/rs6000/rs6000-c.c (is_float128_p): New helper function.
(rs6000_builtin_type_compatible): Treat _Float128 and long double (rs6000_builtin_type_compatible): Treat _Float128 and long double
as being compatible if -mabi=ieeelongdouble. as being compatible if -mabi=ieeelongdouble.
gcc/config/rs6000/rs6000.md
...@@ -2520,12 +2520,6 @@ ...@@ -2520,12 +2520,6 @@
DONE; DONE;
} }
if (TARGET_P9_VECTOR && !MEM_P (src) && !MEM_P (dest))
{
emit_insn (gen_bswapdi2_xxbrd (dest, src));
DONE;
}
if (!TARGET_POWERPC64) if (!TARGET_POWERPC64)
{ {
/* 32-bit mode needs fewer scratch registers, but 32-bit addressing mode /* 32-bit mode needs fewer scratch registers, but 32-bit addressing mode
......
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