Commit ebd8b60d by Steven Bosscher Committed by Steven Bosscher

re PR rtl-optimization/23837 (Wrong code with REG_NO_CONFLICT notes (caused by combine))

	PR rtl-optimization/23837
	* optabs.c (expand_binop): For a multi-word rotate, never emit
	a REG_NO_CONFLICT block.

From-SVN: r108690
parent f3a1a653
2005-12-16 Steven Bosscher <stevenb@suse.de>
PR rtl-optimization/23837
* optabs.c (expand_binop): For a multi-word rotate, never emit
a REG_NO_CONFLICT block.
2005-12-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> 2005-12-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR middle-end/25457 PR middle-end/25457
......
...@@ -1420,7 +1420,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1, ...@@ -1420,7 +1420,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
&& ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing && ashl_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing
&& lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing) && lshr_optab->handlers[(int) word_mode].insn_code != CODE_FOR_nothing)
{ {
rtx insns, equiv_value; rtx insns;
rtx into_target, outof_target; rtx into_target, outof_target;
rtx into_input, outof_input; rtx into_input, outof_input;
rtx inter; rtx inter;
...@@ -1520,20 +1520,12 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1, ...@@ -1520,20 +1520,12 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
if (inter != 0) if (inter != 0)
{ {
if (binoptab->code != UNKNOWN) /* One may be tempted to wrap the insns in a REG_NO_CONFLICT
equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1); block to help the register allocator a bit. But a multi-word
else rotate will need all the input bits when setting the output
equiv_value = 0; bits, so there clearly is a conflict between the input and
output registers. So we can't use a no-conflict block here. */
/* We can't make this a no conflict block if this is a word swap, emit_insn (insns);
because the word swap case fails if the input and output values
are in the same register. */
if (shift_count != BITS_PER_WORD)
emit_no_conflict_block (insns, target, op0, op1, equiv_value);
else
emit_insn (insns);
return target; return target;
} }
} }
......
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