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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
eb7058ce
Commit
eb7058ce
authored
Apr 21, 2005
by
Richard Sandiford
Committed by
Richard Sandiford
Apr 21, 2005
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* gcc.target/mips/branch-1.c: New test.
From-SVN: r98522
parent
0e61db61
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gcc/testsuite/ChangeLog
+4
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gcc/testsuite/gcc.target/mips/branch-1.c
+11
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gcc/testsuite/ChangeLog
View file @
eb7058ce
2005
-
04
-
21
Richard
Sandiford
<
rsandifo
@redhat
.
com
>
*
gcc
.
target
/
mips
/
branch
-
1
.
c
:
New
test
.
2005
-
04
-
21
Richard
Henderson
<
rth
@redhat
.
com
>
*
gcc
.
dg
/
vect
/
vect
-
85
.
c
:
Don
'
t
xfail
on
alpha
.
...
...
gcc/testsuite/gcc.target/mips/branch-1.c
0 → 100644
View file @
eb7058ce
/* We should implement these "if" statements using an "andi" instruction
followed by a branch on zero. */
/* { dg-mips-options "-O2 -mno-mips16" } */
void
bar
(
void
);
void
f1
(
int
x
)
{
if
(
x
&
4
)
bar
();
}
void
f2
(
int
x
)
{
if
((
x
>>
2
)
&
1
)
bar
();
}
void
f3
(
unsigned
int
x
)
{
if
(
x
&
0x10
)
bar
();
}
void
f4
(
unsigned
int
x
)
{
if
((
x
>>
4
)
&
1
)
bar
();
}
/* { dg-final { scan-assembler "\tandi\t.*\tandi\t.*\tandi\t.*\tandi\t" } } */
/* { dg-final { scan-assembler-not "\tsrl\t" } } */
/* { dg-final { scan-assembler-not "\tsra\t" } } */
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