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lvzhengyang
riscv-gcc-1
Commits
ea56ab2a
Commit
ea56ab2a
authored
Jun 27, 1998
by
Richard Henderson
Committed by
Richard Henderson
Jun 27, 1998
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* alpha.md (negsf, negdf): Revert Jan 22 change.
From-SVN: r20755
parent
8abc5081
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gcc/ChangeLog
View file @
ea56ab2a
Sat Jun 27 13:15:30 1998 Richard Henderson <rth@cygnus.com>
* alpha.md (negsf, negdf): Revert Jan 22 change.
Sat Jun 27 07:35:21 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* mkstemp.c: Include gansidecl.h. Rename uint64_t to gcc_uint64_t.
...
...
gcc/config/alpha/alpha.md
View file @
ea56ab2a
...
...
@@ -1722,26 +1722,10 @@
(define_insn "negsf2"
[
(set (match_operand:SF 0 "register_operand" "=f")
(neg:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP
&& alpha_fptm == ALPHA_FPTM_N
"
"TARGET_FP"
"cpysn %R1,%R1,%0"
[
(set_attr "type" "fadd")
]
)
(define_insn ""
[
(set (match_operand:SF 0 "register_operand" "=&f")
(neg:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN"
"sub%,%)%& $f31,%R1,%0"
[
(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn ""
[
(set (match_operand:SF 0 "register_operand" "=f")
(neg:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP"
"sub%,%)%& $f31,%R1,%0"
[
(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn "negdf2"
[
(set (match_operand:DF 0 "register_operand" "=f")
(neg:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
...
...
@@ -1750,22 +1734,6 @@
[
(set_attr "type" "fadd")
]
)
(define_insn ""
[
(set (match_operand:DF 0 "register_operand" "=&f")
(neg:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN"
"sub%-%)%& $f31,%R1,%0"
[
(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn ""
[
(set (match_operand:DF 0 "register_operand" "=f")
(neg:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP"
"sub%-%)%& $f31,%R1,%0"
[
(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn ""
[
(set (match_operand:SF 0 "register_operand" "=&f")
(plus:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG")
(match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
...
...
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