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riscv-gcc-1
Commit e903c96a by David Edelsohn
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Fix last patch to allow indexed operand. 

From-SVN: r45809
parent ca6c03ca
Showing with 2 additions and 2 deletions
gcc/config/rs6000/rs6000.c
......@@ -1310,8 +1310,8 @@ lwa_operand (op, mode)
&& GET_CODE (XEXP (inner, 0)) != PRE_INC
&& GET_CODE (XEXP (inner, 0)) != PRE_DEC
&& (GET_CODE (XEXP (inner, 0)) != PLUS
|| (GET_CODE (XEXP (XEXP (inner, 0), 1)) == CONST_INT
&& INTVAL (XEXP (XEXP (inner, 0), 1)) % 4 == 0)));
|| GET_CODE (XEXP (XEXP (inner, 0), 1)) != CONST_INT
|| INTVAL (XEXP (XEXP (inner, 0), 1)) % 4 == 0));
}
/* Return 1 if the operand, used inside a MEM, is a valid first argument
......
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