20020118-1.c: Skip on vxworks targets.

2009-04-28  Nathan Froyd  <froydnj@codesourcery.com>
	    Mark Mitchell  <mark@codesourcery.com>

	* gcc.target/powerpc/20020118-1.c: Skip on vxworks targets.
	* gcc.dg/20020103-1.c: Check for __ppc.
	* gcc.dg/asm-b.c: Check for __ppc.
	* gcc.dg/20020919-1.c: Check for __ppc.
	* gcc.dg/20020312-2.c: Likewise.
	* gcc.dg/trampoline-1.c: Add appropriate NO_TRAMPOLINES #ifndefs.
	* gcc.dg/torture/asm-subreg-1.c: Skip on sparc vxworks targets.
	* gcc.dg/attr-weakref-1.c: Skip on selected vxworks targets.
	* g++.dg/warn/weak1.C: Likewise.
	* gcc.dg/tree-ssa/20030714-1.c (find_base_value): Declare as
	static so appropriate optimizations kick in.
	(find_base_value_wrapper): New function.
	* g++.dg/eh/simd-5.C: Fix target triplet.
	* gcc.target/arm/long-calls-1.c: Skip for -mlong-calls.

Co-Authored-By: Mark Mitchell <mark@codesourcery.com>

From-SVN: r146876

gcc/testsuite/ChangeLog

+2009-04-28  Nathan Froyd  <froydnj@codesourcery.com>
+	    Mark Mitchell  <mark@codesourcery.com>
+
+	* gcc.target/powerpc/20020118-1.c: Skip on vxworks targets.
+	* gcc.dg/20020103-1.c: Check for __ppc.
+	* gcc.dg/asm-b.c: Check for __ppc.
+	* gcc.dg/20020919-1.c: Check for __ppc.
+	* gcc.dg/20020312-2.c: Likewise.
+	* gcc.dg/trampoline-1.c: Add appropriate NO_TRAMPOLINES #ifndefs.
+	* gcc.dg/torture/asm-subreg-1.c: Skip on sparc vxworks targets.
+	* gcc.dg/attr-weakref-1.c: Skip on selected vxworks targets.
+	* g++.dg/warn/weak1.C: Likewise.
+	* gcc.dg/tree-ssa/20030714-1.c (find_base_value): Declare as
+	static so appropriate optimizations kick in.
+	(find_base_value_wrapper): New function.
+	* g++.dg/eh/simd-5.C: Fix target triplet.
+	* gcc.target/arm/long-calls-1.c: Skip for -mlong-calls.
+
 2009-04-28  Uros Bizjak  <ubizjak@gmail.com>
 	    H.J. Lu  <hongjiu.lu@intel.com>
 

gcc/testsuite/g++.dg/eh/simd-5.C

 // Test EH with V2SI SIMD registers actually restores correct values.
 // Origin: Joseph Myers <joseph@codesourcery.com>
 // { dg-options "-O" }
-// { dg-do run { target powerpc_spe } }
+// { dg-do run { target { powerpc_spe && { ! *-*-vxworks* } } } }
 
 extern "C" void abort (void);
 extern "C" int memcmp (const void *, const void *, __SIZE_TYPE__);

gcc/testsuite/g++.dg/warn/weak1.C

@@ -4,6 +4,10 @@
 // { dg-skip-if "No unsat" { hppa*-*-hpux* } { "*" } { "" } }
 // The darwin loader does, but they do need to exist at link time.
 // { dg-skip-if "No link unsat" { *-*-darwin* } { "*" } { "" } }
+// For kernel modules and static RTPs, the loader treats undefined weak
+// symbols in the same way as undefined strong symbols.  The test
+// therefore fails to load, so skip it.
+// { dg-skip-if "" { "*-*-vxworks*" && nonpic } "*" { "-non-static" } }
 
 extern void foo (void) __attribute__ ((weak));
 

gcc/testsuite/gcc.dg/20020103-1.c

@@ -9,7 +9,7 @@
 #if defined(__i386__)
 #define clobber \
   asm volatile("#asm" : : : "si", "di")
-#elif defined(__powerpc__) || defined(__PPC__) || defined(__ppc__) || defined(__POWERPC__) || defined(PPC) || defined (_IBMR2)
+#elif defined(__powerpc__) || defined(__PPC__) || defined(__ppc__) || defined(__POWERPC__) || defined(PPC) || defined (_IBMR2) || defined (__ppc)
 #define clobber \
   asm volatile("#asm" : : : "14", "15", "16", "17", "18", "19", "20", \
 	       "21", "22", "23", "24", "25", "26", "27", "28", "29")

gcc/testsuite/gcc.dg/20020312-2.c

@@ -48,7 +48,7 @@ extern void abort (void);
 /* PIC register is %r27 or %r19, but is used even without -fpic.  */
 #elif defined(__pdp11__)
 /* No pic register.  */
-#elif defined(__powerpc__) || defined(__PPC__) || defined(__POWERPC__)
+#elif defined(__powerpc__) || defined(__PPC__) || defined(__POWERPC__) || defined (__ppc)
 # ifdef __MACH__
 #  define PIC_REG  "31"
 # else

gcc/testsuite/gcc.dg/20020919-1.c

@@ -38,7 +38,8 @@
 # define REG1 "$8"
 # define REG2 "$9"
 #elif defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) \
-	|| defined (__POWERPC__) || defined (PPC) || defined (_IBMR2)
+	|| defined (__POWERPC__) || defined (PPC) || defined (_IBMR2) \
+	|| defined (__ppc)
 # define REG1 "6"
 # define REG2 "7"
 # if !defined(__powerpc64__) && !defined(__LP64__)

gcc/testsuite/gcc.dg/asm-b.c

@@ -21,7 +21,7 @@ bar (void)
   foo (&x);
   const unsigned int y = x;
   z = &x;
-#if defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) || defined (_POWER) || defined (__ppc64__)
+#if defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) || defined (_POWER) || defined (__ppc64__) || defined (__ppc)
   __asm __volatile ("sthbrx %1,0,%2" : "=m" (*z) : "r" (y), "r" (z));
 #elif defined __i386__ || defined __x86_64__
   __asm __volatile ("movb %b1,1(%2)\n\tmovb %h1,(%2)"

gcc/testsuite/gcc.dg/attr-weakref-1.c

@@ -5,6 +5,10 @@
 // is not available on hppa*-*-hpux*.  The test is skipped rather than
 // xfailed to suppress the warning that would otherwise arise.
 // { dg-skip-if "" { "*-*-darwin*" "hppa*-*-hpux*" } "*" { "" } }
+// For kernel modules and static RTPs, the loader treats undefined weak
+// symbols in the same way as undefined strong symbols.  The test
+// therefore fails to load, so skip it.
+// { dg-skip-if "" { "*-*-vxworks*" && nonpic } "*" { "-non-static" } }
 // { dg-options "-O2" }
 // { dg-additional-sources "attr-weakref-1a.c" }
 

gcc/testsuite/gcc.dg/torture/asm-subreg-1.c

 /* PR middle-end/20491 */
 
 /* { dg-do compile } */
-/* { dg-skip-if "" { hppa*64*-*-* } "*" "" } */
+/* { dg-skip-if "" { hppa*64*-*-* || sparc-*-vxworks* } "*" "" } */
 
 /* Combine used to introduce invalid subregs for the asm input, and
    we'd crash later on, when removing all subregs.  */

gcc/testsuite/gcc.dg/trampoline-1.c

@@ -5,6 +5,8 @@
 /* { dg-require-effective-target trampolines } */
 /* { dg-options "-O2" } */
 
+#ifndef NO_TRAMPOLINES
+
 /* This used to fail on various versions of Solaris 2 because the
    trampoline couldn't be made executable.  */
 
@@ -44,9 +46,12 @@ void foo (void)
       abort();
   }
 }
+#endif
 
 int main (void)
 {
+#ifndef NO_TRAMPOLINES
   foo ();
+#endif
   return 0;
 }

gcc/testsuite/gcc.dg/tree-ssa/20030714-1.c

@@ -15,7 +15,7 @@ struct rtx_def
   unsigned frame_related:1;
 };
 
-rtx
+static rtx
 find_base_value (src)
      rtx src;
 {
@@ -33,6 +33,12 @@ find_base_value (src)
     find_base_value (src_1);
 }
 
+rtx
+find_base_value_wrapper (src)
+     rtx src;
+{
+  return find_base_value (src);
+}
 
 /* There should be no casts to short unsigned int.  */
 /* { dg-final { scan-tree-dump-times "\\(short unsigned int\\)" 0 "dom2"} } */

gcc/testsuite/gcc.target/arm/long-calls-1.c

 /* Check that long calls to different sections are not optimized to "bl".  */
 /* { dg-do compile { target { arm32 && nonpic } } } */
 /* { dg-options "-O2" } */
+/* This test expects that short calls are the default.  */
+/* { dg-skip-if "-mlong-calls in use" { "*-*-*" } { "-mlong-calls" } { "" } } */
 
 #define section(S) __attribute__((section(S)))
 #define weak __attribute__((weak))

gcc/testsuite/gcc.target/powerpc/20020118-1.c

 /* { dg-do run { target powerpc*-*-* } }*/
+/* VxWorks only guarantees 64 bits of alignment (STACK_BOUNDARY == 64).  */
+/* { dg-skip-if "" { "powerpc*-*-vxworks*" } { "*" } { "" } } */
 
 /* Test local alignment.  Test new target macro STARTING_FRAME_PHASE.  */
 /* Origin: Aldy Hernandez <aldyh@redhat.com>.  */