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lvzhengyang
riscv-gcc-1
Commits
e7f80676
Commit
e7f80676
authored
Sep 03, 1994
by
Michael Meissner
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Fix DImode move problems.
From-SVN: r8022
parent
29226a19
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1 changed file
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33 additions
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28 deletions
+33
-28
gcc/config/i386/i386.md
+33
-28
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gcc/config/i386/i386.md
View file @
e7f80676
...
@@ -1352,40 +1352,45 @@
...
@@ -1352,40 +1352,45 @@
"
*
return output_move_double (operands);")
"
*
return output_move_double (operands);")
(define_insn ""
(define_insn ""
[
(set (match_operand:DI 0 "push_operand" "=<")
[
(set (match_operand:DI 0 "push_operand" "=<,<,<")
(match_operand:DI 1 "nonmemory_operand" "riF"))
(match_operand:DI 1 "general_operand" "riF,o,o"))
(clobber (match_scratch:SI 2 "X"))
(clobber (match_scratch:SI 2 "X,=&r,=&r"))
(clobber (match_scratch:SI 3 "X"))]
(clobber (match_scratch:SI 3 "X,=&r,X"))]
"!TARGET_386 && TARGET_MOVE"
"!TARGET_386"
"
*
return output_move_double (operands);")
"
*
{
rtx low
[
1
]
, high
[
1
]
, xop
[
4
]
;
(define_insn ""
split_di (&operands
[
1
]
, 1, low, high);
[
(set (match_operand:DI 0 "push_operand" "=<")
xop
[
0
]
= operands
[
2
]
;
(match_operand:DI 1 "general_operand" "roiF"))
xop
[
1
]
= operands
[
3
]
;
(clobber (match_scratch:SI 2 "X"))
xop
[
2
]
= high
[
0
]
;
(clobber (match_scratch:SI 3 "X"))]
xop
[
3
]
= low
[
0
]
;
"!TARGET_386 && !TARGET_MOVE"
"
*
return output_move_double (operands);")
(define_expand "movdi"
if (GET_CODE (operands
[
1
]
) != MEM)
[
(parallel
[
(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "general_operand" ""))
(clobber (match_scratch:SI 2 ""))
(clobber (match_scratch:SI 3 ""))])]
""
"
{
/
* Don't generate memory->memory moves, go through a register *
/
if (TARGET_MOVE
&& (reload_in_progress | reload_completed) == 0
&& GET_CODE (operands
[
0
]
) == MEM
&& GET_CODE (operands
[
1
]
) == MEM)
{
{
operands
[
1
]
= force_reg (DImode, operands
[
1
]
);
output_asm_insn (AS1 (push%L0,%2), xop);
output_asm_insn (AS1 (push%L0,%3), xop);
}
}
else if (GET_CODE (operands
[
3
]
) == REG)
{ /
* 2 scratch registers available *
/
output_asm_insn (AS2 (mov%L0,%2,%0), xop);
output_asm_insn (AS2 (mov%L0,%3,%1), xop);
output_asm_insn (AS1 (push%L0,%0), xop);
output_asm_insn (AS1 (push%L0,%1), xop);
}
else
{ /
* 1 scratch register *
/
output_asm_insn (AS2 (mov%L0,%2,%0), xop);
output_asm_insn (AS1 (push%L0,%0), xop);
output_asm_insn (AS2 (mov%L0,%3,%0), xop);
output_asm_insn (AS1 (push%L0,%0), xop);
}
RET;
}")
}")
(define_insn ""
(define_insn "
movdi
"
[
(set (match_operand:DI 0 "general_operand" "=r,rm,o,o")
[
(set (match_operand:DI 0 "general_operand" "=r,rm,o,o")
(match_operand:DI 1 "general_operand" "m,riF,o,o"))
(match_operand:DI 1 "general_operand" "m,riF,o,o"))
(clobber (match_scratch:SI 2 "X,X,=&r,=&r"))
(clobber (match_scratch:SI 2 "X,X,=&r,=&r"))
...
...
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