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lvzhengyang
riscv-gcc-1
Commits
e770968b
Commit
e770968b
authored
Mar 02, 1993
by
Jim Wilson
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(mov*): Only accept store zero to memory insn if
rtx_equal_function_value_matters is zero. From-SVN: r3603
parent
778ebe62
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41 additions
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18 deletions
+41
-18
gcc/config/i960/i960.md
+41
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gcc/config/i960/i960.md
View file @
e770968b
...
...
@@ -549,13 +549,21 @@
;; to register move insn to a store (or load) insn without rerecognizing
;; the insn.
;; Special pattern for zero stores to memory for functions which don't use
;; the arg pointer.
;; The i960 does not have any store constant to memory instruction. However,
;; the calling convention is defined so that the arg pointer when it is not
;; overwise being used is zero. Thus, we can handle store zero to memory
;; by storing an unused arg pointer. The arg pointer will be unused if
;; current_function_args_size is zero. This value of this variable is not
;; valid until after all rtl generation is complete, including function
;; inlining (because a function that doesn't need an arg pointer may be
;; inlined into a function that does need an arg pointer), so we must also
;; check that rtx_equal_function_value_matters is zero.
(define_insn ""
[
(set (match_operand:SI 0 "general_operand" "=d,d,d,m")
(match_operand:SI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, SImode)
|| register_operand (operands
[
1
]
, SImode)
|| operands
[
1
]
== const0_rtx)"
...
...
@@ -588,7 +596,8 @@
(define_insn ""
[
(set (match_operand:SI 0 "general_operand" "=d,d,d,m")
(match_operand:SI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, SImode)
|| register_operand (operands
[
1
]
, SImode))"
"
*
...
...
@@ -632,7 +641,8 @@
(define_insn ""
[
(set (match_operand:HI 0 "general_operand" "=d,d,d,m")
(match_operand:HI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, HImode)
|| register_operand (operands
[
1
]
, HImode)
|| operands
[
1
]
== const0_rtx)"
...
...
@@ -666,7 +676,8 @@
(define_insn ""
[
(set (match_operand:HI 0 "general_operand" "=d,d,d,m")
(match_operand:HI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, HImode)
|| register_operand (operands
[
1
]
, HImode))"
"
*
...
...
@@ -707,7 +718,8 @@
(define_insn ""
[
(set (match_operand:QI 0 "general_operand" "=d,d,d,m")
(match_operand:QI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, QImode)
|| register_operand (operands
[
1
]
, QImode)
|| operands
[
1
]
== const0_rtx)"
...
...
@@ -741,7 +753,8 @@
(define_insn ""
[
(set (match_operand:QI 0 "general_operand" "=d,d,d,m")
(match_operand:QI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, QImode)
|| register_operand (operands
[
1
]
, QImode))"
"
*
...
...
@@ -782,7 +795,8 @@
(define_insn ""
[
(set (match_operand:DI 0 "general_operand" "=d,d,d,m,o")
(match_operand:DI 1 "general_operand" "dI,i,m,d,J"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, DImode)
|| register_operand (operands
[
1
]
, DImode)
|| operands
[
1
]
== const0_rtx)"
...
...
@@ -809,7 +823,8 @@
(define_insn ""
[
(set (match_operand:DI 0 "general_operand" "=d,d,d,m")
(match_operand:DI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, DImode)
|| register_operand (operands
[
1
]
, DImode))"
"
*
...
...
@@ -842,7 +857,8 @@
(define_insn ""
[
(set (match_operand:TI 0 "general_operand" "=d,d,d,m,o")
(match_operand:TI 1 "general_operand" "dI,i,m,d,J"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, TImode)
|| register_operand (operands
[
1
]
, TImode)
|| operands
[
1
]
== const0_rtx)"
...
...
@@ -871,7 +887,8 @@
(define_insn ""
[
(set (match_operand:TI 0 "general_operand" "=d,d,d,m")
(match_operand:TI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, TImode)
|| register_operand (operands
[
1
]
, TImode))"
"
*
...
...
@@ -958,7 +975,8 @@
(define_insn ""
[
(set (match_operand:DF 0 "general_operand" "=r,
*
f,d,d,m,o")
(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d,G"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, DFmode)
|| register_operand (operands
[
1
]
, DFmode)
|| operands
[
1
]
== CONST0_RTX (DFmode))"
...
...
@@ -989,7 +1007,8 @@
(define_insn ""
[
(set (match_operand:DF 0 "general_operand" "=r,
*
f,d,d,m")
(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, DFmode)
|| register_operand (operands
[
1
]
, DFmode))"
"
*
...
...
@@ -1026,7 +1045,8 @@
(define_insn ""
[
(set (match_operand:SF 0 "general_operand" "=r,
*
f,d,d,m")
(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, SFmode)
|| register_operand (operands
[
1
]
, SFmode)
|| operands
[
1
]
== CONST0_RTX (SFmode))"
...
...
@@ -1056,7 +1076,8 @@
(define_insn ""
[
(set (match_operand:SF 0 "general_operand" "=r,
*
f,d,d,m")
(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, SFmode)
|| register_operand (operands
[
1
]
, SFmode))"
"
*
...
...
@@ -1907,7 +1928,8 @@
(define_insn ""
[
(set (match_operand:TF 0 "general_operand" "=r,
*
f,d,d,m,o")
(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d,G"))]
"current_function_args_size == 0
"(current_function_args_size == 0
&& rtx_equal_function_value_matters == 0)
&& (register_operand (operands
[
0
]
, TFmode)
|| register_operand (operands
[
1
]
, TFmode)
|| operands
[
1
]
== CONST0_RTX (TFmode))"
...
...
@@ -1940,7 +1962,8 @@
(define_insn ""
[
(set (match_operand:TF 0 "general_operand" "=r,
*
f,d,d,m")
(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size != 0
"(current_function_args_size != 0
|| rtx_equal_function_value_matters != 0)
&& (register_operand (operands
[
0
]
, TFmode)
|| register_operand (operands
[
1
]
, TFmode))"
"
*
...
...
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