Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
e76e75bb
Commit
e76e75bb
authored
Mar 27, 1993
by
Richard Kenner
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
(mov[qhs]i): Allow moving a special reg to itself.
From-SVN: r3891
parent
6ac2ba93
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
15 additions
and
12 deletions
+15
-12
gcc/config/rs6000/rs6000.md
+15
-12
No files found.
gcc/config/rs6000/rs6000.md
View file @
e76e75bb
...
...
@@ -2103,8 +2103,8 @@
}")
(define_insn ""
[
(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,
*c*
q,
*
l")
(match_operand:SI 1 "input_operand" "r,m,r,I,J,
*
h,r,r"))]
[
(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,
*c*
q,
*l
,*
h
")
(match_operand:SI 1 "input_operand" "r,m,r,I,J,
*
h,r,r
,0
"))]
"gpc_reg_operand (operands
[
0
]
, SImode)
|| gpc_reg_operand (operands
[
1
]
, SImode)"
"@
...
...
@@ -2115,8 +2115,9 @@
cau %0,0,%u1
mf%1 %0
mt%0 %1
mt%0 %1"
[
(set_attr "type" "*,load,*,*,*,*,*,mtlr")
]
)
mt%0 %1
cror 0,0,0"
[
(set_attr "type" "*,load,*,*,*,*,*,mtlr,*")
]
)
;; Split a load of a large constant into the appropriate two-insn
;; sequence.
...
...
@@ -2161,8 +2162,8 @@
}")
(define_insn ""
[
(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,
*
h")
(match_operand:HI 1 "input_operand" "r,m,r,i,
*
h,r"))]
[
(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,
*h
,*
h
")
(match_operand:HI 1 "input_operand" "r,m,r,i,
*
h,r
,0
"))]
"gpc_reg_operand (operands
[
0
]
, HImode)
|| gpc_reg_operand (operands
[
1
]
, HImode)"
"@
...
...
@@ -2171,8 +2172,9 @@
sth%U0%X0 %1,%0
cal %0,%w1(0)
mf%1 %0
mt%0 %1"
[
(set_attr "type" "*,load,*,*,*,*")
]
)
mt%0 %1
cror 0,0,0"
[
(set_attr "type" "*,load,*,*,*,*,*")
]
)
(define_expand "movqi"
[
(set (match_operand:QI 0 "general_operand" "")
...
...
@@ -2188,8 +2190,8 @@
}")
(define_insn ""
[
(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,
*
h")
(match_operand:QI 1 "input_operand" "r,m,r,i,
*
h,r"))]
[
(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,
*h
,*
h
")
(match_operand:QI 1 "input_operand" "r,m,r,i,
*
h,r
,0
"))]
"gpc_reg_operand (operands
[
0
]
, QImode)
|| gpc_reg_operand (operands
[
1
]
, QImode)"
"@
...
...
@@ -2198,8 +2200,9 @@
stb%U0%X0 %1,%0
cal %0,%1(0)
mf%1 %0
mt%0 %1"
[
(set_attr "type" "*,load,*,*,*,*")
]
)
mt%0 %1
cror 0,0,0"
[
(set_attr "type" "*,load,*,*,*,*,*")
]
)
;; Here is how to move condition codes around. When we store CC data in
;; an integer register or memory, we store just the high-order 4 bits.
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment