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Commit e71cf74a by H.J. Lu Committed by H.J. Lu
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i386: Rename to ix86_indirect_branch_register 

Rename the variable for -mindirect-branch-register to
ix86_indirect_branch_register to match the command-line option name.

	* config/i386/constraints.md (Bs): Replace
	ix86_indirect_branch_thunk_register with
	ix86_indirect_branch_register.
	(Bw): Likewise.
	* config/i386/i386.md (indirect_jump): Likewise.
	(tablejump): Likewise.
	(*sibcall_memory): Likewise.
	(*sibcall_value_memory): Likewise.
	Peepholes of indirect call and jump via memory: Likewise.
	* config/i386/i386.opt: Likewise.
	* config/i386/predicates.md (indirect_branch_operand): Likewise.
	(GOT_memory_operand): Likewise.
	(call_insn_operand): Likewise.
	(sibcall_insn_operand): Likewise.
	(GOT32_symbol_operand): Likewise.

From-SVN: r256712
parent b4e47472
Showing with 39 additions and 21 deletions
gcc/ChangeLog
2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/constraints.md (Bs): Replace
ix86_indirect_branch_thunk_register with
ix86_indirect_branch_register.
(Bw): Likewise.
* config/i386/i386.md (indirect_jump): Likewise.
(tablejump): Likewise.
(*sibcall_memory): Likewise.
(*sibcall_value_memory): Likewise.
Peepholes of indirect call and jump via memory: Likewise.
* config/i386/i386.opt: Likewise.
* config/i386/predicates.md (indirect_branch_operand): Likewise.
(GOT_memory_operand): Likewise.
(call_insn_operand): Likewise.
(sibcall_insn_operand): Likewise.
(GOT32_symbol_operand): Likewise.
2018-01-15 Jakub Jelinek <jakub@redhat.com> 2018-01-15 Jakub Jelinek <jakub@redhat.com>
PR middle-end/83837 PR middle-end/83837
......
gcc/config/i386/constraints.md
...@@ -226,19 +226,19 @@ ...@@ -226,19 +226,19 @@
(define_constraint "Bs" (define_constraint "Bs"
"@internal Sibcall memory operand." "@internal Sibcall memory operand."
(ior (and (not (match_test "TARGET_X32 (ior (and (not (match_test "TARGET_X32
|| ix86_indirect_branch_thunk_register")) || ix86_indirect_branch_register"))
(match_operand 0 "sibcall_memory_operand")) (match_operand 0 "sibcall_memory_operand"))
(and (match_test "TARGET_X32 && Pmode == DImode (and (match_test "TARGET_X32 && Pmode == DImode
&& !ix86_indirect_branch_thunk_register") && !ix86_indirect_branch_register")
(match_operand 0 "GOT_memory_operand")))) (match_operand 0 "GOT_memory_operand"))))
(define_constraint "Bw" (define_constraint "Bw"
"@internal Call memory operand." "@internal Call memory operand."
(ior (and (not (match_test "TARGET_X32 (ior (and (not (match_test "TARGET_X32
|| ix86_indirect_branch_thunk_register")) || ix86_indirect_branch_register"))
(match_operand 0 "memory_operand")) (match_operand 0 "memory_operand"))
(and (match_test "TARGET_X32 && Pmode == DImode (and (match_test "TARGET_X32 && Pmode == DImode
&& !ix86_indirect_branch_thunk_register") && !ix86_indirect_branch_register")
(match_operand 0 "GOT_memory_operand")))) (match_operand 0 "GOT_memory_operand"))))
(define_constraint "Bz" (define_constraint "Bz"
......
gcc/config/i386/i386.md
...@@ -12311,7 +12311,7 @@ ...@@ -12311,7 +12311,7 @@
[(set (pc) (match_operand 0 "indirect_branch_operand"))] [(set (pc) (match_operand 0 "indirect_branch_operand"))]
"" ""
{ {
if (TARGET_X32 || ix86_indirect_branch_thunk_register) if (TARGET_X32 || ix86_indirect_branch_register)
operands[0] = convert_memory_address (word_mode, operands[0]); operands[0] = convert_memory_address (word_mode, operands[0]);
cfun->machine->has_local_indirect_jump = true; cfun->machine->has_local_indirect_jump = true;
}) })
...@@ -12365,7 +12365,7 @@ ...@@ -12365,7 +12365,7 @@
OPTAB_DIRECT); OPTAB_DIRECT);
} }
if (TARGET_X32 || ix86_indirect_branch_thunk_register) if (TARGET_X32 || ix86_indirect_branch_register)
operands[0] = convert_memory_address (word_mode, operands[0]); operands[0] = convert_memory_address (word_mode, operands[0]);
cfun->machine->has_local_indirect_jump = true; cfun->machine->has_local_indirect_jump = true;
}) })
...@@ -12614,7 +12614,7 @@ ...@@ -12614,7 +12614,7 @@
[(call (mem:QI (match_operand:W 0 "memory_operand" "m")) [(call (mem:QI (match_operand:W 0 "memory_operand" "m"))
(match_operand 1)) (match_operand 1))
(unspec [(const_int 0)] UNSPEC_PEEPSIB)] (unspec [(const_int 0)] UNSPEC_PEEPSIB)]
"!TARGET_X32 && !ix86_indirect_branch_thunk_register" "!TARGET_X32 && !ix86_indirect_branch_register"
"* return ix86_output_call_insn (insn, operands[0]);" "* return ix86_output_call_insn (insn, operands[0]);"
[(set_attr "type" "call")]) [(set_attr "type" "call")])
...@@ -12624,7 +12624,7 @@ ...@@ -12624,7 +12624,7 @@
(call (mem:QI (match_dup 0)) (call (mem:QI (match_dup 0))
(match_operand 3))] (match_operand 3))]
"!TARGET_X32 "!TARGET_X32
&& !ix86_indirect_branch_thunk_register && !ix86_indirect_branch_register
&& SIBLING_CALL_P (peep2_next_insn (1)) && SIBLING_CALL_P (peep2_next_insn (1))
&& !reg_mentioned_p (operands[0], && !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))" CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))"
...@@ -12639,7 +12639,7 @@ ...@@ -12639,7 +12639,7 @@
(call (mem:QI (match_dup 0)) (call (mem:QI (match_dup 0))
(match_operand 3))] (match_operand 3))]
"!TARGET_X32 "!TARGET_X32
&& !ix86_indirect_branch_thunk_register && !ix86_indirect_branch_register
&& SIBLING_CALL_P (peep2_next_insn (2)) && SIBLING_CALL_P (peep2_next_insn (2))
&& !reg_mentioned_p (operands[0], && !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))" CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))"
...@@ -12737,7 +12737,7 @@ ...@@ -12737,7 +12737,7 @@
(match_operand:W 1 "memory_operand")) (match_operand:W 1 "memory_operand"))
(set (pc) (match_dup 0))] (set (pc) (match_dup 0))]
"!TARGET_X32 "!TARGET_X32
&& !ix86_indirect_branch_thunk_register && !ix86_indirect_branch_register
&& peep2_reg_dead_p (2, operands[0])" && peep2_reg_dead_p (2, operands[0])"
[(set (pc) (match_dup 1))]) [(set (pc) (match_dup 1))])
...@@ -12819,7 +12819,7 @@ ...@@ -12819,7 +12819,7 @@
(call (mem:QI (match_operand:W 1 "memory_operand" "m")) (call (mem:QI (match_operand:W 1 "memory_operand" "m"))
(match_operand 2))) (match_operand 2)))
(unspec [(const_int 0)] UNSPEC_PEEPSIB)] (unspec [(const_int 0)] UNSPEC_PEEPSIB)]
"!TARGET_X32 && !ix86_indirect_branch_thunk_register" "!TARGET_X32 && !ix86_indirect_branch_register"
"* return ix86_output_call_insn (insn, operands[1]);" "* return ix86_output_call_insn (insn, operands[1]);"
[(set_attr "type" "callv")]) [(set_attr "type" "callv")])
...@@ -12830,7 +12830,7 @@ ...@@ -12830,7 +12830,7 @@
(call (mem:QI (match_dup 0)) (call (mem:QI (match_dup 0))
(match_operand 3)))] (match_operand 3)))]
"!TARGET_X32 "!TARGET_X32
&& !ix86_indirect_branch_thunk_register && !ix86_indirect_branch_register
&& SIBLING_CALL_P (peep2_next_insn (1)) && SIBLING_CALL_P (peep2_next_insn (1))
&& !reg_mentioned_p (operands[0], && !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))" CALL_INSN_FUNCTION_USAGE (peep2_next_insn (1)))"
...@@ -12847,7 +12847,7 @@ ...@@ -12847,7 +12847,7 @@
(call (mem:QI (match_dup 0)) (call (mem:QI (match_dup 0))
(match_operand 3)))] (match_operand 3)))]
"!TARGET_X32 "!TARGET_X32
&& !ix86_indirect_branch_thunk_register && !ix86_indirect_branch_register
&& SIBLING_CALL_P (peep2_next_insn (2)) && SIBLING_CALL_P (peep2_next_insn (2))
&& !reg_mentioned_p (operands[0], && !reg_mentioned_p (operands[0],
CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))" CALL_INSN_FUNCTION_USAGE (peep2_next_insn (2)))"
......
gcc/config/i386/i386.opt
...@@ -1047,5 +1047,5 @@ EnumValue ...@@ -1047,5 +1047,5 @@ EnumValue
Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
mindirect-branch-register mindirect-branch-register
Target Report Var(ix86_indirect_branch_thunk_register) Init(0) Target Report Var(ix86_indirect_branch_register) Init(0)
Force indirect call and jump via register. Force indirect call and jump via register.
gcc/config/i386/predicates.md
...@@ -666,7 +666,7 @@ ...@@ -666,7 +666,7 @@
(define_predicate "indirect_branch_operand" (define_predicate "indirect_branch_operand"
(ior (match_operand 0 "register_operand") (ior (match_operand 0 "register_operand")
(and (not (match_test "TARGET_X32 (and (not (match_test "TARGET_X32
|| ix86_indirect_branch_thunk_register")) || ix86_indirect_branch_register"))
(match_operand 0 "memory_operand")))) (match_operand 0 "memory_operand"))))
;; Return true if OP is a memory operands that can be used in sibcalls. ;; Return true if OP is a memory operands that can be used in sibcalls.
...@@ -695,7 +695,7 @@ ...@@ -695,7 +695,7 @@
;; Return true if OP is a GOT memory operand. ;; Return true if OP is a GOT memory operand.
(define_predicate "GOT_memory_operand" (define_predicate "GOT_memory_operand"
(and (match_test "!ix86_indirect_branch_thunk_register") (and (match_test "!ix86_indirect_branch_register")
(match_operand 0 "memory_operand")) (match_operand 0 "memory_operand"))
{ {
op = XEXP (op, 0); op = XEXP (op, 0);
...@@ -711,10 +711,10 @@ ...@@ -711,10 +711,10 @@
(op, mode == VOIDmode ? mode : Pmode)") (op, mode == VOIDmode ? mode : Pmode)")
(match_operand 0 "call_register_no_elim_operand") (match_operand 0 "call_register_no_elim_operand")
(ior (and (not (match_test "TARGET_X32 (ior (and (not (match_test "TARGET_X32
|| ix86_indirect_branch_thunk_register")) || ix86_indirect_branch_register"))
(match_operand 0 "memory_operand")) (match_operand 0 "memory_operand"))
(and (match_test "TARGET_X32 && Pmode == DImode (and (match_test "TARGET_X32 && Pmode == DImode
&& !ix86_indirect_branch_thunk_register") && !ix86_indirect_branch_register")
(match_operand 0 "GOT_memory_operand"))))) (match_operand 0 "GOT_memory_operand")))))
;; Similarly, but for tail calls, in which we cannot allow memory references. ;; Similarly, but for tail calls, in which we cannot allow memory references.
...@@ -723,15 +723,15 @@ ...@@ -723,15 +723,15 @@
(op, mode == VOIDmode ? mode : Pmode)") (op, mode == VOIDmode ? mode : Pmode)")
(match_operand 0 "register_no_elim_operand") (match_operand 0 "register_no_elim_operand")
(ior (and (not (match_test "TARGET_X32 (ior (and (not (match_test "TARGET_X32
|| ix86_indirect_branch_thunk_register")) || ix86_indirect_branch_register"))
(match_operand 0 "sibcall_memory_operand")) (match_operand 0 "sibcall_memory_operand"))
(and (match_test "TARGET_X32 && Pmode == DImode (and (match_test "TARGET_X32 && Pmode == DImode
&& !ix86_indirect_branch_thunk_register") && !ix86_indirect_branch_register")
(match_operand 0 "GOT_memory_operand"))))) (match_operand 0 "GOT_memory_operand")))))
;; Return true if OP is a 32-bit GOT symbol operand. ;; Return true if OP is a 32-bit GOT symbol operand.
(define_predicate "GOT32_symbol_operand" (define_predicate "GOT32_symbol_operand"
(match_test "!ix86_indirect_branch_thunk_register (match_test "!ix86_indirect_branch_register
&& GET_CODE (op) == CONST && GET_CODE (op) == CONST
&& GET_CODE (XEXP (op, 0)) == UNSPEC && GET_CODE (XEXP (op, 0)) == UNSPEC
&& XINT (XEXP (op, 0), 1) == UNSPEC_GOT")) && XINT (XEXP (op, 0), 1) == UNSPEC_GOT"))
......
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