Commit e6f0e052 by Uros Bizjak

re PR target/55948 (__atomic_clear / __atomic_store_n ignore HLE_RELEASE flags)

	PR target/55948
	* config/i386/sync.md (atomic_store<mode>_1): New pattern.
	(atomic_store<mode>): Call atomic_store<mode>_1 for IX86_HLE_RELEASE
	memmodel flag.

testsuite/ChangeLog

	PR target/55948
	* gcc.target/i386/hle-clear-rel.c: New file
	* gcc.target/i386/hle-store-rel.c: New file.

From-SVN: r195155
parent 197fa28c
2012-01-14 Uros Bizjak <ubizjak@gmail.com>
Andi Kleen <ak@linux.intel.com>
PR target/55948
* config/i386/sync.md (atomic_store<mode>_1): New pattern.
(atomic_store<mode>): Call atomic_store<mode>_1 for IX86_HLE_RELEASE
memmodel flag.
2013-01-14 Georg-Johann Lay <avr@gjlay.de> 2013-01-14 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr-stdint.h: Remove trailing blanks. * config/avr/avr-stdint.h: Remove trailing blanks.
...@@ -7,7 +15,7 @@ ...@@ -7,7 +15,7 @@
* config/avr/avr-dimode.md: Same. * config/avr/avr-dimode.md: Same.
* config/avr/predicates.md: Same. * config/avr/predicates.md: Same.
* config/avr/avr-c.c: Same. And fix typo. * config/avr/avr-c.c: Same. And fix typo.
* config/avr/avr-protos.h: Same. And: * config/avr/avr-protos.h: Same. And:
(function_arg_regno_p): Rename to avr_function_arg_regno_p. (function_arg_regno_p): Rename to avr_function_arg_regno_p.
(init_cumulative_args): Rename to avr_init_cumulative_args. (init_cumulative_args): Rename to avr_init_cumulative_args.
......
...@@ -224,8 +224,12 @@ ...@@ -224,8 +224,12 @@
DONE; DONE;
} }
/* Otherwise use a normal store. */ /* Otherwise use a store. */
emit_move_insn (operands[0], operands[1]); if (INTVAL (operands[2]) & IX86_HLE_RELEASE)
emit_insn (gen_atomic_store<mode>_1 (operands[0], operands[1],
operands[2]));
else
emit_move_insn (operands[0], operands[1]);
} }
/* ... followed by an MFENCE, if required. */ /* ... followed by an MFENCE, if required. */
if (model == MEMMODEL_SEQ_CST) if (model == MEMMODEL_SEQ_CST)
...@@ -233,6 +237,14 @@ ...@@ -233,6 +237,14 @@
DONE; DONE;
}) })
(define_insn "atomic_store<mode>_1"
[(set (match_operand:ATOMIC 0 "memory_operand" "=m")
(unspec:ATOMIC [(match_operand:ATOMIC 1 "<nonmemory_operand>" "<r><i>")
(match_operand:SI 2 "const_int_operand")]
UNSPEC_MOVA))]
""
"%K2mov{<imodesuffix>}\t{%1, %0|%0, %1}")
(define_insn_and_split "atomic_storedi_fpu" (define_insn_and_split "atomic_storedi_fpu"
[(set (match_operand:DI 0 "memory_operand" "=m,m,m") [(set (match_operand:DI 0 "memory_operand" "=m,m,m")
(unspec:DI [(match_operand:DI 1 "register_operand" "x,m,?r")] (unspec:DI [(match_operand:DI 1 "register_operand" "x,m,?r")]
......
2012-01-14 Andi Kleen <ak@linux.intel.com>
PR target/55948
* gcc.target/i386/hle-clear-rel.c: New file
* gcc.target/i386/hle-store-rel.c: New file.
2013-01-14 Harald Anlauf <anlauf@gmx.de> 2013-01-14 Harald Anlauf <anlauf@gmx.de>
* gfortran.dg/aint_anint_1.f90: Add dg-do run. * gfortran.dg/aint_anint_1.f90: Add dg-do run.
...@@ -62,14 +68,13 @@ ...@@ -62,14 +68,13 @@
2013-01-10 Richard Sandiford <rdsandiford@googlemail.com> 2013-01-10 Richard Sandiford <rdsandiford@googlemail.com>
Update copyright years Update copyright years.
2013-01-10 Aldy Hernandez <aldyh@redhat.com> 2013-01-10 Aldy Hernandez <aldyh@redhat.com>
Jakub Jelinek <jakub@redhat.com> Jakub Jelinek <jakub@redhat.com>
PR target/55565 PR target/55565
* gcc.target/powerpc/ppc-mov-1.c: Update scan-assembler-not * gcc.target/powerpc/ppc-mov-1.c: Update scan-assembler-not regex.
regex.
2013-01-10 Vladimir Makarov <vmakarov@redhat.com> 2013-01-10 Vladimir Makarov <vmakarov@redhat.com>
...@@ -140,7 +145,7 @@ ...@@ -140,7 +145,7 @@
2013-01-09 Jan Hubicka <jh@suse.cz> 2013-01-09 Jan Hubicka <jh@suse.cz>
PR tree-optimiation/55875 PR tree-optimization/55875
* gcc.c-torture/execute/pr55875.c: New testcase. * gcc.c-torture/execute/pr55875.c: New testcase.
* g++.dg/torture/pr55875.C: New testcase. * g++.dg/torture/pr55875.C: New testcase.
...@@ -181,14 +186,14 @@ ...@@ -181,14 +186,14 @@
2013-01-08 James Greenhalgh <james.greenhalgh@arm.com> 2013-01-08 James Greenhalgh <james.greenhalgh@arm.com>
* gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c: New. * gcc.target/aarch64/vect-fcm-eq-d.c: New.
* gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. * gcc.target/aarch64/vect-fcm-eq-f.c: Likewise.
* gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c: Likewise. * gcc.target/aarch64/vect-fcm-ge-d.c: Likewise.
* gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. * gcc.target/aarch64/vect-fcm-ge-f.c: Likewise.
* gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. * gcc.target/aarch64/vect-fcm-gt-d.c: Likewise.
* gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c: Likewise. * gcc.target/aarch64/vect-fcm-gt-f.c: Likewise.
* gcc/testsuite/gcc.target/aarch64/vect-fcm.x: Likewise. * gcc.target/aarch64/vect-fcm.x: Likewise.
* gcc/testsuite/lib/target-supports.exp * lib/target-supports.exp
(check_effective_target_vect_cond): Enable for AArch64. (check_effective_target_vect_cond): Enable for AArch64.
2013-01-08 James Greenhalgh <james.greenhalgh@arm.com> 2013-01-08 James Greenhalgh <james.greenhalgh@arm.com>
......
/* { dg-do compile } */
/* { dg-options "-mhle" } */
/* { dg-final { scan-assembler "\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+mov" } } */
void
hle_clear (char *p, int v)
{
__atomic_clear (p, __ATOMIC_RELEASE | __ATOMIC_HLE_RELEASE);
}
/* { dg-do compile } */
/* { dg-options "-mhle" } */
/* { dg-final { scan-assembler "\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+mov" } } */
void
hle_store (int *p, int v)
{
__atomic_store_n (p, v, __ATOMIC_RELEASE | __ATOMIC_HLE_RELEASE);
}
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