Commit e6dcfa18 by Ramana Radhakrishnan Committed by Ramana Radhakrishnan

Remove unnecessary space.

From-SVN: r201241
parent 0b93d3b6
2013-07-25 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> 2013-07-25 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.md (*sibcall_insn): Remove unnecessary space.
2013-07-25 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/19599 PR target/19599
PR target/57731 PR target/57731
PR target/57748 PR target/57748
* config/arm/arm.md ("*sibcall_value_insn): Replace use of * config/arm/arm.md ("*sibcall_insn): Replace use of
Ss with US. Adjust output for v5 and v4t. Ss with US. Adjust output for v5 and v4t.
(*sibcall_value_insn): Likewise and loosen predicate on (*sibcall_value_insn): Likewise and loosen predicate on
operand0. operand0.
* config/arm/constraints.md ("Ss"): Rename to US. * config/arm/constraints.md ("Ss"): Rename to US.
2013-07-25 Terry Guo <terry.guo@arm.com> 2013-07-25 Terry Guo <terry.guo@arm.com>
......
...@@ -9630,7 +9630,7 @@ ...@@ -9630,7 +9630,7 @@
else else
{ {
if (arm_arch5 || arm_arch4t) if (arm_arch5 || arm_arch4t)
return \" bx%?\\t%0\\t%@ indirect register sibling call\"; return \"bx%?\\t%0\\t%@ indirect register sibling call\";
else else
return \"mov%?\\t%|pc, %0\\t%@ indirect register sibling call\"; return \"mov%?\\t%|pc, %0\\t%@ indirect register sibling call\";
} }
......
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