Commit e6715081 by Richard Sandiford Committed by Richard Sandiford

poly_int: instantiate_virtual_regs

This patch makes the instantiate virtual regs pass track offsets
as poly_ints.

2017-12-21  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* function.c (in_arg_offset, var_offset, dynamic_offset)
	(out_arg_offset, cfa_offset): Change from int to poly_int64.
	(instantiate_new_reg): Return the new offset as a poly_int64_pod
	rather than a HOST_WIDE_INT.
	(instantiate_virtual_regs_in_rtx): Track polynomial offsets.
	(instantiate_virtual_regs_in_insn): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r255920
parent 68184180
...@@ -2,6 +2,17 @@ ...@@ -2,6 +2,17 @@
Alan Hayward <alan.hayward@arm.com> Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com> David Sherwood <david.sherwood@arm.com>
* function.c (in_arg_offset, var_offset, dynamic_offset)
(out_arg_offset, cfa_offset): Change from int to poly_int64.
(instantiate_new_reg): Return the new offset as a poly_int64_pod
rather than a HOST_WIDE_INT.
(instantiate_virtual_regs_in_rtx): Track polynomial offsets.
(instantiate_virtual_regs_in_insn): Likewise.
2017-12-21 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (get_args_size, add_args_size_note): New functions. * rtl.h (get_args_size, add_args_size_note): New functions.
(find_args_size_adjust): Return a poly_int64 rather than a (find_args_size_adjust): Return a poly_int64 rather than a
HOST_WIDE_INT. HOST_WIDE_INT.
...@@ -1367,11 +1367,11 @@ initial_value_entry (int i, rtx *hreg, rtx *preg) ...@@ -1367,11 +1367,11 @@ initial_value_entry (int i, rtx *hreg, rtx *preg)
routines. They contain the offsets of the virtual registers from their routines. They contain the offsets of the virtual registers from their
respective hard registers. */ respective hard registers. */
static int in_arg_offset; static poly_int64 in_arg_offset;
static int var_offset; static poly_int64 var_offset;
static int dynamic_offset; static poly_int64 dynamic_offset;
static int out_arg_offset; static poly_int64 out_arg_offset;
static int cfa_offset; static poly_int64 cfa_offset;
/* In most machines, the stack pointer register is equivalent to the bottom /* In most machines, the stack pointer register is equivalent to the bottom
of the stack. */ of the stack. */
...@@ -1418,10 +1418,10 @@ static int cfa_offset; ...@@ -1418,10 +1418,10 @@ static int cfa_offset;
offset indirectly through the pointer. Otherwise, return 0. */ offset indirectly through the pointer. Otherwise, return 0. */
static rtx static rtx
instantiate_new_reg (rtx x, HOST_WIDE_INT *poffset) instantiate_new_reg (rtx x, poly_int64_pod *poffset)
{ {
rtx new_rtx; rtx new_rtx;
HOST_WIDE_INT offset; poly_int64 offset;
if (x == virtual_incoming_args_rtx) if (x == virtual_incoming_args_rtx)
{ {
...@@ -1480,7 +1480,7 @@ instantiate_virtual_regs_in_rtx (rtx *loc) ...@@ -1480,7 +1480,7 @@ instantiate_virtual_regs_in_rtx (rtx *loc)
if (rtx x = *loc) if (rtx x = *loc)
{ {
rtx new_rtx; rtx new_rtx;
HOST_WIDE_INT offset; poly_int64 offset;
switch (GET_CODE (x)) switch (GET_CODE (x))
{ {
case REG: case REG:
...@@ -1533,7 +1533,7 @@ safe_insn_predicate (int code, int operand, rtx x) ...@@ -1533,7 +1533,7 @@ safe_insn_predicate (int code, int operand, rtx x)
static void static void
instantiate_virtual_regs_in_insn (rtx_insn *insn) instantiate_virtual_regs_in_insn (rtx_insn *insn)
{ {
HOST_WIDE_INT offset; poly_int64 offset;
int insn_code, i; int insn_code, i;
bool any_change = false; bool any_change = false;
rtx set, new_rtx, x; rtx set, new_rtx, x;
...@@ -1572,7 +1572,8 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn) ...@@ -1572,7 +1572,8 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
to the generic case is avoiding a new pseudo and eliminating a to the generic case is avoiding a new pseudo and eliminating a
move insn in the initial rtl stream. */ move insn in the initial rtl stream. */
new_rtx = instantiate_new_reg (SET_SRC (set), &offset); new_rtx = instantiate_new_reg (SET_SRC (set), &offset);
if (new_rtx && offset != 0 if (new_rtx
&& maybe_ne (offset, 0)
&& REG_P (SET_DEST (set)) && REG_P (SET_DEST (set))
&& REGNO (SET_DEST (set)) > LAST_VIRTUAL_REGISTER) && REGNO (SET_DEST (set)) > LAST_VIRTUAL_REGISTER)
{ {
...@@ -1598,17 +1599,18 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn) ...@@ -1598,17 +1599,18 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
/* Handle a plus involving a virtual register by determining if the /* Handle a plus involving a virtual register by determining if the
operands remain valid if they're modified in place. */ operands remain valid if they're modified in place. */
poly_int64 delta;
if (GET_CODE (SET_SRC (set)) == PLUS if (GET_CODE (SET_SRC (set)) == PLUS
&& recog_data.n_operands >= 3 && recog_data.n_operands >= 3
&& recog_data.operand_loc[1] == &XEXP (SET_SRC (set), 0) && recog_data.operand_loc[1] == &XEXP (SET_SRC (set), 0)
&& recog_data.operand_loc[2] == &XEXP (SET_SRC (set), 1) && recog_data.operand_loc[2] == &XEXP (SET_SRC (set), 1)
&& CONST_INT_P (recog_data.operand[2]) && poly_int_rtx_p (recog_data.operand[2], &delta)
&& (new_rtx = instantiate_new_reg (recog_data.operand[1], &offset))) && (new_rtx = instantiate_new_reg (recog_data.operand[1], &offset)))
{ {
offset += INTVAL (recog_data.operand[2]); offset += delta;
/* If the sum is zero, then replace with a plain move. */ /* If the sum is zero, then replace with a plain move. */
if (offset == 0 if (known_eq (offset, 0)
&& REG_P (SET_DEST (set)) && REG_P (SET_DEST (set))
&& REGNO (SET_DEST (set)) > LAST_VIRTUAL_REGISTER) && REGNO (SET_DEST (set)) > LAST_VIRTUAL_REGISTER)
{ {
...@@ -1686,7 +1688,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn) ...@@ -1686,7 +1688,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
new_rtx = instantiate_new_reg (x, &offset); new_rtx = instantiate_new_reg (x, &offset);
if (new_rtx == NULL) if (new_rtx == NULL)
continue; continue;
if (offset == 0) if (known_eq (offset, 0))
x = new_rtx; x = new_rtx;
else else
{ {
...@@ -1711,7 +1713,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn) ...@@ -1711,7 +1713,7 @@ instantiate_virtual_regs_in_insn (rtx_insn *insn)
new_rtx = instantiate_new_reg (SUBREG_REG (x), &offset); new_rtx = instantiate_new_reg (SUBREG_REG (x), &offset);
if (new_rtx == NULL) if (new_rtx == NULL)
continue; continue;
if (offset != 0) if (maybe_ne (offset, 0))
{ {
start_sequence (); start_sequence ();
new_rtx = expand_simple_binop new_rtx = expand_simple_binop
......
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