Commit e500c62a by Kirill Yukhin Committed by Kirill Yukhin

predicates.md (ext_sse_reg_operand): New.

* gcc/config/i386/predicates.md (ext_sse_reg_operand): New.
* gcc/config/i386/i386.md (*movti_internal): Use
predicate to determine if EVEX is needed.
(*movsi_internal): Ditto.
(*movdf_internal): Ditto.
(*movsf_internal): Ditto.
* gcc/config/i386/mmx.md (*mov<mode>_internal): Ditto.

From-SVN: r201936
parent 6b00d7dd
2013-08-23 Kirill Yukhin <kirill.yukhin@intel.com>
* gcc/config/i386/predicates.md (ext_sse_reg_operand): New.
* gcc/config/i386/i386.md (*movti_internal): Use
predicate to determine if EVEX is needed.
(*movsi_internal): Ditto.
(*movdf_internal): Ditto.
(*movsf_internal): Ditto.
* gcc/config/i386/mmx.md (*mov<mode>_internal): Ditto.
2013-08-23 Jakub Jelinek <jakub@redhat.com> 2013-08-23 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/58209 PR tree-optimization/58209
......
...@@ -2059,9 +2059,8 @@ ...@@ -2059,9 +2059,8 @@
(cond [(eq_attr "alternative" "2") (cond [(eq_attr "alternative" "2")
(const_string "SI") (const_string "SI")
(eq_attr "alternative" "12,13") (eq_attr "alternative" "12,13")
(cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))") (cond [(ior (match_operand 0 "ext_sse_reg_operand")
(and (match_test "REG_P (operands[1])") (match_operand 1 "ext_sse_reg_operand"))
(match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
(const_string "XI") (const_string "XI")
(ior (not (match_test "TARGET_SSE2")) (ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")) (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
...@@ -2192,9 +2191,8 @@ ...@@ -2192,9 +2191,8 @@
(cond [(eq_attr "alternative" "2,3") (cond [(eq_attr "alternative" "2,3")
(const_string "DI") (const_string "DI")
(eq_attr "alternative" "6,7") (eq_attr "alternative" "6,7")
(cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))") (cond [(ior (match_operand 0 "ext_sse_reg_operand")
(and (match_test "REG_P (operands[1])") (match_operand 1 "ext_sse_reg_operand"))
(match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
(const_string "XI") (const_string "XI")
(ior (not (match_test "TARGET_SSE2")) (ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")) (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
...@@ -2923,9 +2921,8 @@ ...@@ -2923,9 +2921,8 @@
/* movaps is one byte shorter for non-AVX targets. */ /* movaps is one byte shorter for non-AVX targets. */
(eq_attr "alternative" "10,14") (eq_attr "alternative" "10,14")
(cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))") (cond [(ior (match_operand 0 "ext_sse_reg_operand")
(and (match_test "REG_P (operands[1])") (match_operand 1 "ext_sse_reg_operand"))
(match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
(const_string "V8DF") (const_string "V8DF")
(ior (not (match_test "TARGET_SSE2")) (ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")) (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
...@@ -3072,9 +3069,8 @@ ...@@ -3072,9 +3069,8 @@
better to maintain the whole registers in single format better to maintain the whole registers in single format
to avoid problems on using packed logical operations. */ to avoid problems on using packed logical operations. */
(eq_attr "alternative" "6") (eq_attr "alternative" "6")
(cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))") (cond [(ior (match_operand 0 "ext_sse_reg_operand")
(and (match_test "REG_P (operands[1])") (match_operand 1 "ext_sse_reg_operand"))
(match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
(const_string "V16SF") (const_string "V16SF")
(ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY") (ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
(match_test "TARGET_SSE_SPLIT_REGS")) (match_test "TARGET_SSE_SPLIT_REGS"))
......
...@@ -185,9 +185,8 @@ ...@@ -185,9 +185,8 @@
(cond [(eq_attr "alternative" "2") (cond [(eq_attr "alternative" "2")
(const_string "SI") (const_string "SI")
(eq_attr "alternative" "11,12,15,16") (eq_attr "alternative" "11,12,15,16")
(cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))") (cond [(ior (match_operand 0 "ext_sse_reg_operand")
(and (match_test "REG_P (operands[1])") (match_operand 1 "ext_sse_reg_operand"))
(match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
(const_string "XI") (const_string "XI")
(match_test "<MODE>mode == V2SFmode") (match_test "<MODE>mode == V2SFmode")
(const_string "V4SF") (const_string "V4SF")
......
...@@ -47,6 +47,12 @@ ...@@ -47,6 +47,12 @@
(and (match_code "reg") (and (match_code "reg")
(match_test "SSE_REGNO_P (REGNO (op))"))) (match_test "SSE_REGNO_P (REGNO (op))")))
;; True if the operand is an AVX-512 new register.
(define_predicate "ext_sse_reg_operand"
(and (match_code "reg")
(match_test "EXT_REX_SSE_REGNO_P (REGNO (op))")))
;; True if the operand is a Q_REGS class register. ;; True if the operand is a Q_REGS class register.
(define_predicate "q_regs_operand" (define_predicate "q_regs_operand"
(match_operand 0 "register_operand") (match_operand 0 "register_operand")
......
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