[PATCH][AARCH64]Add backend aarch64_bfi pattern.

2015-08-26  Renlin Li  <renlin.li@arm.com>

gcc/
	* config/aarch64/aarch64.md (aarch64_bfi): New pattern.

gcc/testsuite/
	* gcc.target/aarch64/combine_bfi_1.c: New.

From-SVN: r227226

gcc/ChangeLog

+2015-08-26  Renlin Li  <renlin.li@arm.com>
+
+	* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode><ALLX:mode>4): New.
+
 2015-08-26  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 	    Jiong Wang  <jiong.wang@arm.com>
 

gcc/config/aarch64/aarch64.md

@@ -3927,6 +3927,16 @@
   [(set_attr "type" "bfm")]
 )
 
+(define_insn "*aarch64_bfi<GPI:mode><ALLX:mode>4"
+  [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
+			  (match_operand 1 "const_int_operand" "n")
+			  (match_operand 2 "const_int_operand" "n"))
+	(zero_extend:GPI (match_operand:ALLX 3  "register_operand" "r")))]
+  "UINTVAL (operands[1]) <= <ALLX:sizen>"
+  "bfi\\t%<GPI:w>0, %<GPI:w>3, %2, %1"
+  [(set_attr "type" "bfm")]
+)
+
 (define_insn "*extr_insv_lower_reg<mode>"
   [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
 			  (match_operand 1 "const_int_operand" "n")

gcc/testsuite/ChangeLog

+2015-08-26  Renlin Li  <renlin.li@arm.com>
+
+	* gcc.target/aarch64/combine_bfi_1.c: New testcase.
+
 2015-08-26  Jiong Wang  <jiong.wang@arm.com>
 
 	* gcc.target/aarch64/tlsie_tiny_1.c: New testcase.

gcc/testsuite/gcc.target/aarch64/combine_bfi_1.c

+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-rtl-combine" } */
+
+int
+f1 (int x, int y)
+{
+  return (x & ~0x0ffff00) | ((y << 8) & 0x0ffff00);
+}
+
+int
+f2 (int x, int y)
+{
+  return (x & ~0x0ff000) | ((y & 0x0ff) << 12);
+}
+
+int
+f3 (int x, int y)
+{
+  return (x & ~0xffff) | (y & 0xffff);
+}
+
+int
+f4 (int x, int y)
+{
+  return (x & ~0xff) | (y & 0xff);
+}
+
+long
+f5 (long x, long y)
+{
+  return (x & ~0xffffffffull) | (y & 0xffffffff);
+}
+
+/* { dg-final { scan-rtl-dump-times "\\*aarch64_bfi" 5 "combine" } } */