re PR rtl-optimization/50396 (SSE division by zero generates incorrect code with…

re PR rtl-optimization/50396 (SSE division by zero generates incorrect code with optimizations enabled)

2011-12-23  Richard Guenther  <rguenther@suse.de>

	PR rtl-optimization/50396
	* simplify-rtx.c (simplify_binary_operation_1): Properly
	guard code that only works for integers.

	* gcc.dg/torture/pr50396.c: New testcase.

From-SVN: r182653

gcc/ChangeLog

+2011-12-23  Richard Guenther  <rguenther@suse.de>
+
+	PR rtl-optimization/50396
+	* simplify-rtx.c (simplify_binary_operation_1): Properly
+	guard code that only works for integers.
+
 2011-12-23  Tristan Gingold  <gingold@adacore.com>
 
 	* config/vms/vms-crtlmap.map (log10): Fix typo.

gcc/simplify-rtx.c

@@ -2953,7 +2953,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
 		}
 	    }
 	}
-      else
+      else if (SCALAR_INT_MODE_P (mode))
 	{
 	  /* 0/x is 0 (or x&0 if x has side-effects).  */
 	  if (trueop0 == CONST0_RTX (mode)

gcc/testsuite/ChangeLog

+2011-12-23  Richard Guenther  <rguenther@suse.de>
+
+	PR rtl-optimization/50396
+	* gcc.dg/torture/pr50396.c: New testcase.
+
 2011-12-22  Bin Cheng  <bin.cheng@arm.com>
 
 	PR tree-optimization/43491

gcc/testsuite/gcc.dg/torture/pr50396.c

+/* { dg-do run } */
+
+extern void abort (void);
+typedef float vf128 __attribute__((vector_size(16)));
+typedef float vf64 __attribute__((vector_size(8)));
+int main()
+{
+#if !__FINITE_MATH_ONLY__
+#if __FLT_HAS_QUIET_NAN__
+  vf128 v = (vf128){ 0.f, 0.f, 0.f, 0.f };
+  vf64 u = (vf64){ 0.f, 0.f };
+  v = v / (vf128){ 0.f, 0.f, 0.f, 0.f };
+  if (v[0] == v[0])
+    abort ();
+  u = u / (vf64){ 0.f, 0.f };
+  if (u[0] == u[0])
+    abort ();
+#endif
+#endif
+  return 0;
+}