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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
e454beb7
Commit
e454beb7
authored
Jan 21, 1997
by
Ian Lance Taylor
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Comment out stack probe insn
From-SVN: r13538
parent
a01dce9a
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gcc/config/mips/mips.md
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gcc/config/mips/mips.md
View file @
e454beb7
...
@@ -3,7 +3,7 @@
...
@@ -3,7 +3,7 @@
;; Changes by Michael Meissner, meissner@osf.org
;; Changes by Michael Meissner, meissner@osf.org
;; 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and
;; 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and
;; Brendan Eich, brendan@microunity.com.
;; Brendan Eich, brendan@microunity.com.
;; Copyright (C) 1989, 90-
5, 1996
Free Software Foundation, Inc.
;; Copyright (C) 1989, 90-
96, 1997
Free Software Foundation, Inc.
;; This file is part of GNU CC.
;; This file is part of GNU CC.
...
@@ -6890,18 +6890,21 @@ move\\t%0,%z4\\n\\
...
@@ -6890,18 +6890,21 @@ move\\t%0,%z4\\n\\
(set_attr "mode" "none")
(set_attr "mode" "none")
(set_attr "length" "1")])
(set_attr "length" "1")])
(define_expand "probe"
;; The MIPS chip does not seem to require stack probes.
[
(set (match_dup 0)
;;
(match_dup 1))]
;; (define_expand "probe"
""
;;
[
(set (match_dup 0)
"
;; (match_dup 1))]
{
;; ""
operands
[
0
]
= gen_reg_rtx (SImode);
;; "
operands
[
1
]
= gen_rtx (MEM, SImode, stack_pointer_rtx);
;; {
MEM_VOLATILE_P (operands
[
1
]
) = TRUE;
;; operands
[
0
]
= gen_reg_rtx (SImode);
;; operands
[
1
]
= gen_rtx (MEM, SImode, stack_pointer_rtx);
/
* fall through and generate default code *
/
;; MEM_VOLATILE_P (operands
[
1
]
) = TRUE;
}")
;;
;; /
* fall through and generate default code *
/
;; }")
;;
;;
;;
;; MIPS4 Conditional move instructions.
;; MIPS4 Conditional move instructions.
...
...
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