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Commit e3cf7a95 by Georg-Johann Lay Committed by Georg-Johann Lay
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re PR target/54607 ([avr]: Canadian cross build fails because… 

re PR target/54607 ([avr]: Canadian cross build fails because gen-avr-mmcu-texi.c is compiled with the wrong compiler)

	PR target/54607
	* config.gcc (tm_file,avr): Add avr/avr-arch.h.
	* config/avr/t-avr (gen-avr-mmcu-texi): Use CC_FOR_BUILD to
	compile.  Don't depend on TM_H.  Use CFLAGS_FOR_BUILD.
	* config/avr/avr.h (avr_arch, base_arch_s, mcu_type_s): Source out
	to...
	* config/avr/avr-arch.h: ...this new file.
	* config/avr/gen-avr-mmcu-texi.c: Include avr-arch.h, stdio.h,
	stdlib.h.
	* comparator: Make letters smaller than digits.
	* config/avr/avr-devices.c: Don't include headers if used in
	gen-avr-mmcu-texi.c.
	* doc/avr-mmcu.texi: Regenerate.

From-SVN: r191390
parent 78ab1ff4
Showing with 226 additions and 142 deletions
gcc/ChangeLog
2012-09-17 Georg-Johann Lay <avr@gjlay.de>
PR target/54607
* config.gcc (tm_file,avr): Add avr/avr-arch.h.
* config/avr/t-avr (gen-avr-mmcu-texi): Use CC_FOR_BUILD to
compile. Don't depend on TM_H. Use CFLAGS_FOR_BUILD.
* config/avr/avr.h (avr_arch, base_arch_s, mcu_type_s): Source out
to...
* config/avr/avr-arch.h: ...this new file.
* config/avr/gen-avr-mmcu-texi.c: Include avr-arch.h, stdio.h,
stdlib.h.
* comparator: Make letters smaller than digits.
* config/avr/avr-devices.c: Don't include headers if used in
gen-avr-mmcu-texi.c.
* doc/avr-mmcu.texi: Regenerate.
2012-09-17 Georg-Johann Lay <avr@gjlay.de>
* rtl.h (CONST_FIXED_P): New predicate macro.
2012-09-17 Eric Botcazou <ebotcazou@adacore.com>
......
gcc/config.gcc
......@@ -886,13 +886,13 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*)
tm_file="${tm_file} arm/aout.h arm/arm.h"
;;
avr-*-rtems*)
tm_file="elfos.h avr/elf.h avr/avr.h dbxelf.h avr/rtems.h rtems.h newlib-stdint.h"
tm_file="elfos.h avr/elf.h avr/avr-arch.h avr/avr.h dbxelf.h avr/rtems.h rtems.h newlib-stdint.h"
tmake_file="avr/t-avr avr/t-multilib t-rtems avr/t-rtems"
extra_gcc_objs="driver-avr.o avr-devices.o"
extra_objs="avr-devices.o avr-log.o"
;;
avr-*-*)
tm_file="elfos.h avr/elf.h avr/avr.h dbxelf.h avr/avr-stdint.h"
tm_file="elfos.h avr/elf.h avr/avr-arch.h avr/avr.h dbxelf.h avr/avr-stdint.h"
if test x${with_avrlibc} != xno; then
tm_file="${tm_file} ${cpu_type}/avrlibc.h"
tm_defines="${tm_defines} WITH_AVRLIBC"
......
gcc/config/avr/avr-arch.h 0 → 100644
/* Definitions of types that are used to store AVR architecture and
device information.
Copyright (C) 2012 Free Software Foundation, Inc.
Contributed by Georg-Johann Lay (avr@gjlay.de)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* This enum supplies indices into the avr_arch_types[] table below. */
enum avr_arch
{
ARCH_UNKNOWN,
ARCH_AVR1,
ARCH_AVR2,
ARCH_AVR25,
ARCH_AVR3,
ARCH_AVR31,
ARCH_AVR35,
ARCH_AVR4,
ARCH_AVR5,
ARCH_AVR51,
ARCH_AVR6,
ARCH_AVRXMEGA2,
ARCH_AVRXMEGA4,
ARCH_AVRXMEGA5,
ARCH_AVRXMEGA6,
ARCH_AVRXMEGA7
};
/* Architecture-specific properties. */
struct base_arch_s
{
/* Assembler only. */
int asm_only;
/* Core have 'MUL*' instructions. */
int have_mul;
/* Core have 'CALL' and 'JMP' instructions. */
int have_jmp_call;
/* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
int have_movw_lpmx;
/* Core have 'ELPM' instructions. */
int have_elpm;
/* Core have 'ELPM Rx,Z' instructions. */
int have_elpmx;
/* Core have 'EICALL' and 'EIJMP' instructions. */
int have_eijmp_eicall;
/* This is an XMEGA core. */
int xmega_p;
/* This core has the RAMPD special function register
and thus also the RAMPX, RAMPY and RAMPZ registers. */
int have_rampd;
/* Default start of data section address for architecture. */
int default_data_section_start;
/* Offset between SFR address and RAM address:
SFR-address = RAM-address - sfr_offset */
int sfr_offset;
/* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
const char *const macro;
/* Architecture name. */
const char *const arch_name;
};
/* Device-specific properties. */
struct mcu_type_s
{
/* Device name. */
const char *const name;
/* Index in avr_arch_types[]. */
enum avr_arch arch;
/* Must lie outside user's namespace. NULL == no macro. */
const char *const macro;
/* Stack pointer have 8 bits width. */
int short_sp;
/* Some AVR devices have a core erratum when skipping a 2-word instruction.
Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE.
Problems will occur with return address is IRQ executes during the
skip sequence.
A support ticket from Atmel returned the following information:
Subject: (ATTicket:644469) On AVR skip-bug core Erratum
From: avr@atmel.com Date: 2011-07-27
(Please keep the subject when replying to this mail)
This errata exists only in AT90S8515 and ATmega103 devices.
For information please refer the following respective errata links
http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf */
/* Core Erratum: Must not skip 2-word instruction. */
int errata_skip;
/* Start of data section. */
int data_section_start;
/* Number of 64k segments in the flash. */
int n_flash;
/* Name of device library. */
const char *const library_name;
};
/* Map architecture to its texinfo string. */
struct arch_info_s
{
/* Architecture ID. */
enum avr_arch arch;
/* textinfo source to describe the archtiecture. */
const char *texinfo;
};
/* Preprocessor macros to define depending on MCU type. */
extern const char *avr_extra_arch_macro;
extern const struct base_arch_s *avr_current_arch;
extern const struct mcu_type_s *avr_current_device;
extern const struct mcu_type_s avr_mcu_types[];
extern const struct base_arch_s avr_arch_types[];
gcc/config/avr/avr-devices.c
......@@ -18,10 +18,12 @@
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef IN_GEN_AVR_MMCU_TEXI
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#endif /* IN_GEN_AVR_MMCU_TEXI */
/* List of all known AVR MCU architectures.
Order as of enum avr_arch from avr.h. */
......
gcc/config/avr/avr.h
......@@ -21,133 +21,6 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Names to predefine in the preprocessor for this target machine. */
struct base_arch_s
{
/* Assembler only. */
int asm_only;
/* Core have 'MUL*' instructions. */
int have_mul;
/* Core have 'CALL' and 'JMP' instructions. */
int have_jmp_call;
/* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
int have_movw_lpmx;
/* Core have 'ELPM' instructions. */
int have_elpm;
/* Core have 'ELPM Rx,Z' instructions. */
int have_elpmx;
/* Core have 'EICALL' and 'EIJMP' instructions. */
int have_eijmp_eicall;
/* This is an XMEGA core. */
int xmega_p;
/* This core has the RAMPD special function register
and thus also the RAMPX, RAMPY and RAMPZ registers. */
int have_rampd;
/* Default start of data section address for architecture. */
int default_data_section_start;
/* Offset between SFR address and RAM address:
SFR-address = RAM-address - sfr_offset */
int sfr_offset;
/* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
const char *const macro;
/* Architecture name. */
const char *const arch_name;
};
/* These names are used as the index into the avr_arch_types[] table
above. */
enum avr_arch
{
ARCH_UNKNOWN,
ARCH_AVR1,
ARCH_AVR2,
ARCH_AVR25,
ARCH_AVR3,
ARCH_AVR31,
ARCH_AVR35,
ARCH_AVR4,
ARCH_AVR5,
ARCH_AVR51,
ARCH_AVR6,
ARCH_AVRXMEGA2,
ARCH_AVRXMEGA4,
ARCH_AVRXMEGA5,
ARCH_AVRXMEGA6,
ARCH_AVRXMEGA7
};
struct mcu_type_s {
/* Device name. */
const char *const name;
/* Index in avr_arch_types[]. */
enum avr_arch arch;
/* Must lie outside user's namespace. NULL == no macro. */
const char *const macro;
/* Stack pointer have 8 bits width. */
int short_sp;
/* Some AVR devices have a core erratum when skipping a 2-word instruction.
Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE.
Problems will occur with return address is IRQ executes during the
skip sequence.
A support ticket from Atmel returned the following information:
Subject: (ATTicket:644469) On AVR skip-bug core Erratum
From: avr@atmel.com Date: 2011-07-27
(Please keep the subject when replying to this mail)
This errata exists only in AT90S8515 and ATmega103 devices.
For information please refer the following respective errata links
http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf */
/* Core Erratum: Must not skip 2-word instruction. */
int errata_skip;
/* Start of data section. */
int data_section_start;
/* Number of 64k segments in the flash. */
int n_flash;
/* Name of device library. */
const char *const library_name;
};
struct arch_info_s {
/* Architecture ID. */
enum avr_arch arch;
/* textinfo source to describe the archtiecture. */
const char *texinfo;
};
/* Preprocessor macros to define depending on MCU type. */
extern const char *avr_extra_arch_macro;
extern const struct base_arch_s *avr_current_arch;
extern const struct mcu_type_s *avr_current_device;
extern const struct mcu_type_s avr_mcu_types[];
extern const struct base_arch_s avr_arch_types[];
typedef struct
{
/* Id of the address space as used in c_register_addr_space */
......
gcc/config/avr/gen-avr-mmcu-texi.c
......@@ -18,18 +18,52 @@
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include <stdlib.h>
#include <stdio.h>
#define IN_GEN_AVR_MMCU_TEXI
#include "avr-arch.h"
#include "avr-devices.c"
static const char*
mcu_name[sizeof avr_mcu_types / sizeof avr_mcu_types[0]];
static int letter (char c)
{
return c >= 'a' && c <= 'z';
}
static int digit (char c)
{
return c >= '0' && c <= '9';
}
static int
comparator (const void *va, const void *vb)
{
const char* const *a = (const char* const*) va;
const char* const *b = (const char* const*) vb;
const char *a = *(const char* const*) va;
const char *b = *(const char* const*) vb;
while (*a && *b)
{
/* Make letters smaller than digits so that `atmega16a' follows
`atmega16' without `atmega161' etc. between them. */
if (letter (*a) && digit (*b))
return -1;
if (digit (*a) && letter (*b))
return 1;
if (*a != *b)
return *a - *b;
a++;
b++;
}
return strcmp (*a, *b);
return *a - *b;
}
static void
......@@ -61,6 +95,7 @@ int main (void)
printf ("@c This file is generated automatically using\n");
printf ("@c gcc/config/avr/gen-avr-mmcu-texi.c from:\n");
printf ("@c gcc/config/avr/avr-arch.h\n");
printf ("@c gcc/config/avr/avr-devices.c\n");
printf ("@c gcc/config/avr/avr-mcus.def\n\n");
......
gcc/config/avr/t-avr
......@@ -44,8 +44,9 @@ $(srcdir)/config/avr/avr-tables.opt: $(srcdir)/config/avr/genopt.sh $(AVR_MCUS)
$(SHELL) $< $(AVR_MCUS) > $@
gen-avr-mmcu-texi$(build_exeext): $(srcdir)/config/avr/gen-avr-mmcu-texi.c \
$(TM_H) $(AVR_MCUS) $(srcdir)/config/avr/avr-devices.c
$(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< -o $@
$(AVR_MCUS) $(srcdir)/config/avr/avr-devices.c \
$(srcdir)/config/avr/avr-arch.h
$(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $< -o $@
# Make sure that the -mmcu= documentation is in sync with the compiler.
$(srcdir)/doc/avr-mmcu.texi: s-avr-mmcu-texi; @true
......
gcc/doc/avr-mmcu.texi
......@@ -4,6 +4,7 @@
@c This file is generated automatically using
@c gcc/config/avr/gen-avr-mmcu-texi.c from:
@c gcc/config/avr/avr-arch.h
@c gcc/config/avr/avr-devices.c
@c gcc/config/avr/avr-mcus.def
......@@ -13,11 +14,11 @@
@item avr2
``Classic'' devices with up to 8@tie{}KiB of program memory.
@*@var{mcu}@tie{}= @code{at90c8534}, @code{at90s2313}, @code{at90s2323}, @code{at90s2333}, @code{at90s2343}, @code{at90s4414}, @code{at90s4433}, @code{at90s4434}, @code{at90s8515}, @code{at90s8535}, @code{attiny22}, @code{attiny26}.
@*@var{mcu}@tie{}= @code{attiny22}, @code{attiny26}, @code{at90c8534}, @code{at90s2313}, @code{at90s2323}, @code{at90s2333}, @code{at90s2343}, @code{at90s4414}, @code{at90s4433}, @code{at90s4434}, @code{at90s8515}, @code{at90s8535}.
@item avr25
``Classic'' devices with up to 8@tie{}KiB of program memory and with the @code{MOVW} instruction.
@*@var{mcu}@tie{}= @code{at86rf401}, @code{ata6289}, @code{attiny13}, @code{attiny13a}, @code{attiny2313}, @code{attiny2313a}, @code{attiny24}, @code{attiny24a}, @code{attiny25}, @code{attiny261}, @code{attiny261a}, @code{attiny4313}, @code{attiny43u}, @code{attiny44}, @code{attiny44a}, @code{attiny45}, @code{attiny461}, @code{attiny461a}, @code{attiny48}, @code{attiny84}, @code{attiny84a}, @code{attiny85}, @code{attiny861}, @code{attiny861a}, @code{attiny87}, @code{attiny88}.
@*@var{mcu}@tie{}= @code{ata6289}, @code{attiny13}, @code{attiny13a}, @code{attiny2313}, @code{attiny2313a}, @code{attiny24}, @code{attiny24a}, @code{attiny25}, @code{attiny261}, @code{attiny261a}, @code{attiny43u}, @code{attiny4313}, @code{attiny44}, @code{attiny44a}, @code{attiny45}, @code{attiny461}, @code{attiny461a}, @code{attiny48}, @code{attiny84}, @code{attiny84a}, @code{attiny85}, @code{attiny861}, @code{attiny861a}, @code{attiny87}, @code{attiny88}, @code{at86rf401}.
@item avr3
``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
......@@ -25,23 +26,23 @@
@item avr31
``Classic'' devices with 128@tie{}KiB of program memory.
@*@var{mcu}@tie{}= @code{at43usb320}, @code{atmega103}.
@*@var{mcu}@tie{}= @code{atmega103}, @code{at43usb320}.
@item avr35
``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory and with the @code{MOVW} instruction.
@*@var{mcu}@tie{}= @code{at90usb162}, @code{at90usb82}, @code{atmega16u2}, @code{atmega32u2}, @code{atmega8u2}, @code{attiny167}.
@*@var{mcu}@tie{}= @code{atmega16u2}, @code{atmega32u2}, @code{atmega8u2}, @code{attiny167}, @code{at90usb162}, @code{at90usb82}.
@item avr4
``Enhanced'' devices with up to 8@tie{}KiB of program memory.
@*@var{mcu}@tie{}= @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}, @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega8}, @code{atmega8515}, @code{atmega8535}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{atmega8hva}.
@*@var{mcu}@tie{}= @code{atmega48}, @code{atmega48a}, @code{atmega48p}, @code{atmega8}, @code{atmega8hva}, @code{atmega8515}, @code{atmega8535}, @code{atmega88}, @code{atmega88a}, @code{atmega88p}, @code{atmega88pa}, @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b}, @code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}.
@item avr5
``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
@*@var{mcu}@tie{}= @code{at90can32}, @code{at90can64}, @code{at90pwm216}, @code{at90pwm316}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{atmega16}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega32}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega325}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega325a}, @code{atmega325p}, @code{atmega328}, @code{atmega328p}, @code{atmega329}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega406}, @code{atmega64}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega645}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega645a}, @code{atmega645p}, @code{atmega649}, @code{atmega6490}, @code{atmega649a}, @code{atmega649p}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64m1}, @code{m3000}.
@*@var{mcu}@tie{}= @code{atmega16}, @code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2}, @code{atmega16hvb}, @code{atmega16m1}, @code{atmega16u4}, @code{atmega161}, @code{atmega162}, @code{atmega163}, @code{atmega164a}, @code{atmega164p}, @code{atmega165}, @code{atmega165a}, @code{atmega165p}, @code{atmega168}, @code{atmega168a}, @code{atmega168p}, @code{atmega169}, @code{atmega169a}, @code{atmega169p}, @code{atmega169pa}, @code{atmega32}, @code{atmega32c1}, @code{atmega32hvb}, @code{atmega32m1}, @code{atmega32u4}, @code{atmega32u6}, @code{atmega323}, @code{atmega324a}, @code{atmega324p}, @code{atmega324pa}, @code{atmega325}, @code{atmega325a}, @code{atmega325p}, @code{atmega3250}, @code{atmega3250a}, @code{atmega3250p}, @code{atmega328}, @code{atmega328p}, @code{atmega329}, @code{atmega329a}, @code{atmega329p}, @code{atmega329pa}, @code{atmega3290}, @code{atmega3290a}, @code{atmega3290p}, @code{atmega406}, @code{atmega64}, @code{atmega64c1}, @code{atmega64hve}, @code{atmega64m1}, @code{atmega640}, @code{atmega644}, @code{atmega644a}, @code{atmega644p}, @code{atmega644pa}, @code{atmega645}, @code{atmega645a}, @code{atmega645p}, @code{atmega6450}, @code{atmega6450a}, @code{atmega6450p}, @code{atmega649}, @code{atmega649a}, @code{atmega649p}, @code{atmega6490}, @code{at90can32}, @code{at90can64}, @code{at90pwm216}, @code{at90pwm316}, @code{at90scr100}, @code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{m3000}.
@item avr51
``Enhanced'' devices with 128@tie{}KiB of program memory.
@*@var{mcu}@tie{}= @code{at90can128}, @code{at90usb1286}, @code{at90usb1287}, @code{atmega128}, @code{atmega1280}, @code{atmega1281}, @code{atmega1284p}, @code{atmega128rfa1}.
@*@var{mcu}@tie{}= @code{atmega128}, @code{atmega128rfa1}, @code{atmega1280}, @code{atmega1281}, @code{atmega1284p}, @code{at90can128}, @code{at90usb1286}, @code{at90usb1287}.
@item avr6
``Enhanced'' devices with 3-byte PC, i.e.@: with more than 128@tie{}KiB of program memory.
......@@ -69,6 +70,6 @@
@item avr1
This ISA is implemented by the minimal AVR core and supported for assembler only.
@*@var{mcu}@tie{}= @code{at90s1200}, @code{attiny11}, @code{attiny12}, @code{attiny15}, @code{attiny28}.
@*@var{mcu}@tie{}= @code{attiny11}, @code{attiny12}, @code{attiny15}, @code{attiny28}, @code{at90s1200}.
@end table
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