Commit e2d457f1 by Kaveh R. Ghazi Committed by Kaveh Ghazi

i860-protos.h: New file.

        * i860-protos.h: New file.

        * i860.c: Include tm_p.h.  Add static prototypes.  Fix compile
        time warnings.

        * i860.h: Move prototypes to i860-protos.h.  Fix compile time warnings.

        * i860.md: Likewise.

From-SVN: r31330
parent f90800f8
2000-01-11 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* i860-protos.h: New file.
* i860.c: Include tm_p.h. Add static prototypes. Fix compile
time warnings.
* i860.h: Move prototypes to i860-protos.h. Fix compile time warnings.
* i860.md: Likewise.
Tue Jan 11 18:59:35 MET 2000 Jan Hubicka <jh@suse.cz> Tue Jan 11 18:59:35 MET 2000 Jan Hubicka <jh@suse.cz>
* i386.md (movstrsi expander): Rewrite. * i386.md (movstrsi expander): Rewrite.
......
/* Definitions of target machine for GNU compiler, for Intel 860.
Copyright (C) 2000 Free Software Foundation, Inc.
Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to
the whims of the System V Release 4 assembler.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Declare things which are defined in i860.c but called from
insn-output.c. */
#ifdef RTX_CODE
extern unsigned long sfmode_constant_to_ulong PARAMS ((rtx));
extern const char *output_load PARAMS ((rtx *));
extern const char *output_store PARAMS ((rtx *));
extern const char *output_move_double PARAMS ((rtx *));
extern const char *output_fp_move_double PARAMS ((rtx *));
extern const char *output_block_move PARAMS ((rtx *));
extern const char *output_delay_insn PARAMS ((rtx));
#if 0
extern const char *output_delayed_branch PARAMS ((const char *, rtx *, rtx));
#endif
extern void output_load_address PARAMS ((rtx *));
extern int safe_insn_src_p PARAMS ((rtx, enum machine_mode));
extern int operand_clobbered_before_used_after PARAMS ((rtx, rtx));
extern int single_insn_src_p PARAMS ((rtx, enum machine_mode));
extern int reg_or_0_operand PARAMS ((rtx, enum machine_mode));
extern int arith_operand PARAMS ((rtx, enum machine_mode));
extern int logic_operand PARAMS ((rtx, enum machine_mode));
extern int shift_operand PARAMS ((rtx, enum machine_mode));
extern int compare_operand PARAMS ((rtx, enum machine_mode));
extern int bte_operand PARAMS ((rtx, enum machine_mode));
extern int indexed_operand PARAMS ((rtx, enum machine_mode));
extern int load_operand PARAMS ((rtx, enum machine_mode));
extern int small_int PARAMS ((rtx, enum machine_mode));
extern int logic_int PARAMS ((rtx, enum machine_mode));
extern int call_insn_operand PARAMS ((rtx, enum machine_mode));
extern rtx i860_saveregs PARAMS ((void));
#ifdef TREE_CODE
extern void i860_va_start PARAMS ((int, tree, rtx));
extern rtx i860_va_arg PARAMS ((tree, tree));
#endif /* TREE_CODE */
#endif /* RTX_CODE */
#ifdef TREE_CODE
extern tree i860_build_va_list PARAMS ((void));
#endif /* TREE_CODE */
extern void function_prologue PARAMS ((FILE *, unsigned));
extern void function_epilogue PARAMS ((FILE *, unsigned));
/* Subroutines for insn-output.c for Intel 860 /* Subroutines for insn-output.c for Intel 860
Copyright (C) 1989, 91, 97, 98, 1999 Free Software Foundation, Inc. Copyright (C) 1989, 91, 97-99, 2000 Free Software Foundation, Inc.
Derived from sparc.c. Derived from sparc.c.
Written by Richard Stallman (rms@ai.mit.edu). Written by Richard Stallman (rms@ai.mit.edu).
...@@ -41,14 +41,20 @@ Boston, MA 02111-1307, USA. */ ...@@ -41,14 +41,20 @@ Boston, MA 02111-1307, USA. */
#include "insn-attr.h" #include "insn-attr.h"
#include "function.h" #include "function.h"
#include "expr.h" #include "expr.h"
#include "tm_p.h"
static rtx find_addr_reg (); static rtx find_addr_reg PARAMS ((rtx));
static int reg_clobbered_p PARAMS ((rtx, rtx));
static const char *singlemove_string PARAMS ((rtx *));
static const char *load_opcode PARAMS ((enum machine_mode, const char *, rtx));
static const char *store_opcode PARAMS ((enum machine_mode, const char *, rtx));
static void output_size_for_block_move PARAMS ((rtx, rtx, rtx));
#ifndef I860_REG_PREFIX #ifndef I860_REG_PREFIX
#define I860_REG_PREFIX "" #define I860_REG_PREFIX ""
#endif #endif
char *i860_reg_prefix = I860_REG_PREFIX; const char *i860_reg_prefix = I860_REG_PREFIX;
/* Save information from a "cmpxx" operation until the branch is emitted. */ /* Save information from a "cmpxx" operation until the branch is emitted. */
...@@ -454,7 +460,7 @@ load_operand (op, mode) ...@@ -454,7 +460,7 @@ load_operand (op, mode)
int int
small_int (op, mode) small_int (op, mode)
rtx op; rtx op;
enum machine_mode mode; enum machine_mode mode ATTRIBUTE_UNUSED;
{ {
return (GET_CODE (op) == CONST_INT && SMALL_INT (op)); return (GET_CODE (op) == CONST_INT && SMALL_INT (op));
} }
...@@ -465,7 +471,7 @@ small_int (op, mode) ...@@ -465,7 +471,7 @@ small_int (op, mode)
int int
logic_int (op, mode) logic_int (op, mode)
rtx op; rtx op;
enum machine_mode mode; enum machine_mode mode ATTRIBUTE_UNUSED;
{ {
return (GET_CODE (op) == CONST_INT && LOGIC_INT (op)); return (GET_CODE (op) == CONST_INT && LOGIC_INT (op));
} }
...@@ -478,7 +484,7 @@ logic_int (op, mode) ...@@ -478,7 +484,7 @@ logic_int (op, mode)
int int
call_insn_operand (op, mode) call_insn_operand (op, mode)
rtx op; rtx op;
enum machine_mode mode; enum machine_mode mode ATTRIBUTE_UNUSED;
{ {
if (GET_CODE (op) == MEM if (GET_CODE (op) == MEM
&& (CONSTANT_ADDRESS_P (XEXP (op, 0)) && (CONSTANT_ADDRESS_P (XEXP (op, 0))
...@@ -493,7 +499,7 @@ call_insn_operand (op, mode) ...@@ -493,7 +499,7 @@ call_insn_operand (op, mode)
/* Return the best assembler insn template /* Return the best assembler insn template
for moving operands[1] into operands[0] as a fullword. */ for moving operands[1] into operands[0] as a fullword. */
static char * static const char *
singlemove_string (operands) singlemove_string (operands)
rtx *operands; rtx *operands;
{ {
...@@ -566,7 +572,7 @@ singlemove_string (operands) ...@@ -566,7 +572,7 @@ singlemove_string (operands)
/* Output assembler code to perform a doubleword move insn /* Output assembler code to perform a doubleword move insn
with operands OPERANDS. */ with operands OPERANDS. */
char * const char *
output_move_double (operands) output_move_double (operands)
rtx *operands; rtx *operands;
{ {
...@@ -740,7 +746,7 @@ output_move_double (operands) ...@@ -740,7 +746,7 @@ output_move_double (operands)
return ""; return "";
} }
char * const char *
output_fp_move_double (operands) output_fp_move_double (operands)
rtx *operands; rtx *operands;
{ {
...@@ -839,14 +845,14 @@ find_addr_reg (addr) ...@@ -839,14 +845,14 @@ find_addr_reg (addr)
This string is in static storage. */ This string is in static storage. */
static char * static const char *
load_opcode (mode, args, reg) load_opcode (mode, args, reg)
enum machine_mode mode; enum machine_mode mode;
char *args; const char *args;
rtx reg; rtx reg;
{ {
static char buf[30]; static char buf[30];
char *opcode; const char *opcode;
switch (mode) switch (mode)
{ {
...@@ -886,14 +892,14 @@ load_opcode (mode, args, reg) ...@@ -886,14 +892,14 @@ load_opcode (mode, args, reg)
This string is in static storage. */ This string is in static storage. */
static char * static const char *
store_opcode (mode, args, reg) store_opcode (mode, args, reg)
enum machine_mode mode; enum machine_mode mode;
char *args; const char *args;
rtx reg; rtx reg;
{ {
static char buf[30]; static char buf[30];
char *opcode; const char *opcode;
switch (mode) switch (mode)
{ {
...@@ -937,13 +943,12 @@ store_opcode (mode, args, reg) ...@@ -937,13 +943,12 @@ store_opcode (mode, args, reg)
It may also output some insns directly. It may also output some insns directly.
It may alter the values of operands[0] and operands[1]. */ It may alter the values of operands[0] and operands[1]. */
char * const char *
output_store (operands) output_store (operands)
rtx *operands; rtx *operands;
{ {
enum machine_mode mode = GET_MODE (operands[0]); enum machine_mode mode = GET_MODE (operands[0]);
rtx address = XEXP (operands[0], 0); rtx address = XEXP (operands[0], 0);
char *string;
cc_status.flags |= CC_KNOW_HI_R31 | CC_HI_R31_ADJ; cc_status.flags |= CC_KNOW_HI_R31 | CC_HI_R31_ADJ;
cc_status.mdep = address; cc_status.mdep = address;
...@@ -979,7 +984,7 @@ output_store (operands) ...@@ -979,7 +984,7 @@ output_store (operands)
It may also output some insns directly. It may also output some insns directly.
It may alter the values of operands[0] and operands[1]. */ It may alter the values of operands[0] and operands[1]. */
char * const char *
output_load (operands) output_load (operands)
rtx *operands; rtx *operands;
{ {
...@@ -1131,16 +1136,18 @@ output_size_for_block_move (size, reg, align) ...@@ -1131,16 +1136,18 @@ output_size_for_block_move (size, reg, align)
OPERANDS[3] is the known safe alignment. OPERANDS[3] is the known safe alignment.
OPERANDS[4..6] are pseudos we can safely clobber as temps. */ OPERANDS[4..6] are pseudos we can safely clobber as temps. */
char * const char *
output_block_move (operands) output_block_move (operands)
rtx *operands; rtx *operands;
{ {
/* A vector for our computed operands. Note that load_output_address /* A vector for our computed operands. Note that load_output_address
makes use of (and can clobber) up to the 8th element of this vector. */ makes use of (and can clobber) up to the 8th element of this vector. */
rtx xoperands[10]; rtx xoperands[10];
#if 0
rtx zoperands[10]; rtx zoperands[10];
#endif
static int movstrsi_label = 0; static int movstrsi_label = 0;
int i, j; int i;
rtx temp1 = operands[4]; rtx temp1 = operands[4];
rtx alignrtx = operands[3]; rtx alignrtx = operands[3];
int align = INTVAL (alignrtx); int align = INTVAL (alignrtx);
...@@ -1350,9 +1357,9 @@ output_block_move (operands) ...@@ -1350,9 +1357,9 @@ output_block_move (operands)
constrain_operands to segfault. Anyone who cares should fix up constrain_operands to segfault. Anyone who cares should fix up
the code to use the DBR pass. */ the code to use the DBR pass. */
char * const char *
output_delayed_branch (template, operands, insn) output_delayed_branch (template, operands, insn)
char *template; const char *template;
rtx *operands; rtx *operands;
rtx insn; rtx insn;
{ {
...@@ -1391,7 +1398,7 @@ output_delayed_branch (template, operands, insn) ...@@ -1391,7 +1398,7 @@ output_delayed_branch (template, operands, insn)
&& CONSTANT_ADDRESS_P (XEXP (dest, 0)))) && CONSTANT_ADDRESS_P (XEXP (dest, 0))))
{ {
rtx xoperands[2]; rtx xoperands[2];
char *split_template; const char *split_template;
xoperands[0] = dest; xoperands[0] = dest;
xoperands[1] = src; xoperands[1] = src;
...@@ -1464,11 +1471,11 @@ output_delayed_branch (template, operands, insn) ...@@ -1464,11 +1471,11 @@ output_delayed_branch (template, operands, insn)
} }
/* Output a newly constructed insn DELAY_INSN. */ /* Output a newly constructed insn DELAY_INSN. */
char * const char *
output_delay_insn (delay_insn) output_delay_insn (delay_insn)
rtx delay_insn; rtx delay_insn;
{ {
char *template; const char *template;
int insn_code_number; int insn_code_number;
int i; int i;
...@@ -1642,7 +1649,6 @@ sfmode_constant_to_ulong (x) ...@@ -1642,7 +1649,6 @@ sfmode_constant_to_ulong (x)
#endif #endif
extern char call_used_regs[]; extern char call_used_regs[];
extern int leaf_function_p ();
char *current_function_original_name; char *current_function_original_name;
...@@ -2035,7 +2041,7 @@ function_epilogue (asm_file, local_bytes) ...@@ -2035,7 +2041,7 @@ function_epilogue (asm_file, local_bytes)
fprintf (asm_file, "\tfld.l %d(%sfp),%s%s\n", fprintf (asm_file, "\tfld.l %d(%sfp),%s%s\n",
must_preserve_bytes + (4 * restored_so_far++), must_preserve_bytes + (4 * restored_so_far++),
i860_reg_prefix, i860_reg_prefix, reg_names[i]); i860_reg_prefix, i860_reg_prefix, reg_names[i]);
if (i > 33 & i < 40) if (i > 33 && i < 40)
flags->fregs |= mask; flags->fregs |= mask;
} }
if (i > 33 && i < 40) if (i > 33 && i < 40)
......
/* Definitions of target machine for GNU compiler, for Intel 860. /* Definitions of target machine for GNU compiler, for Intel 860.
Copyright (C) 1989, 91, 93, 95-98, 1999 Free Software Foundation, Inc. Copyright (C) 1989, 91, 93, 95-99, 2000 Free Software Foundation, Inc.
Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to
the whims of the System V Release 4 assembler. the whims of the System V Release 4 assembler.
...@@ -1274,8 +1274,7 @@ do { ASM_OUTPUT_ALIGN ((FILE), 2); \ ...@@ -1274,8 +1274,7 @@ do { ASM_OUTPUT_ALIGN ((FILE), 2); \
"%" in i860.c. "%" in i860.c.
*/ */
extern char *i860_reg_prefix; extern const char *i860_reg_prefix;
extern unsigned long sfmode_constant_to_ulong ();
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '?') #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '?')
...@@ -1332,16 +1331,14 @@ extern unsigned long sfmode_constant_to_ulong (); ...@@ -1332,16 +1331,14 @@ extern unsigned long sfmode_constant_to_ulong ();
else if ((CODE) == 'r' && (X) == CONST0_RTX (GET_MODE (X))) \ else if ((CODE) == 'r' && (X) == CONST0_RTX (GET_MODE (X))) \
fprintf (FILE, "%sf0", i860_reg_prefix); \ fprintf (FILE, "%sf0", i860_reg_prefix); \
else if (GET_CODE (X) == CONST_DOUBLE) \ else if (GET_CODE (X) == CONST_DOUBLE) \
fprintf (FILE, "0x%x", sfmode_constant_to_ulong (X)); \ fprintf (FILE, "0x%lx", sfmode_constant_to_ulong (X)); \
else \ else \
output_addr_const (FILE, X); } output_addr_const (FILE, X); }
/* Print a memory address as an operand to reference that memory location. */ /* Print a memory address as an operand to reference that memory location. */
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
{ register rtx base, index = 0; \ { register rtx addr = ADDR; \
int offset = 0; \
register rtx addr = ADDR; \
if (GET_CODE (addr) == REG) \ if (GET_CODE (addr) == REG) \
{ \ { \
fprintf (FILE, "0(%s%s)", \ fprintf (FILE, "0(%s%s)", \
...@@ -1349,7 +1346,7 @@ extern unsigned long sfmode_constant_to_ulong (); ...@@ -1349,7 +1346,7 @@ extern unsigned long sfmode_constant_to_ulong ();
} \ } \
else if (GET_CODE (addr) == CONST_DOUBLE \ else if (GET_CODE (addr) == CONST_DOUBLE \
&& GET_MODE (addr) == SFmode) \ && GET_MODE (addr) == SFmode) \
fprintf (FILE, "0x%x", sfmode_constant_to_ulong (addr)); \ fprintf (FILE, "0x%lx", sfmode_constant_to_ulong (addr)); \
else if (GET_CODE (addr) == PLUS) \ else if (GET_CODE (addr) == PLUS) \
{ \ { \
if ((GET_CODE (XEXP (addr, 0)) == CONST_INT) \ if ((GET_CODE (XEXP (addr, 0)) == CONST_INT) \
...@@ -1433,18 +1430,3 @@ extern unsigned long sfmode_constant_to_ulong (); ...@@ -1433,18 +1430,3 @@ extern unsigned long sfmode_constant_to_ulong ();
hasn't been defined! */ hasn't been defined! */
extern struct rtx_def *i860_compare_op0, *i860_compare_op1; extern struct rtx_def *i860_compare_op0, *i860_compare_op1;
/* Declare things which are defined in i860.c but called from
insn-output.c. */
extern unsigned long sfmode_constant_to_ulong ();
extern char *output_load ();
extern char *output_store ();
extern char *output_move_double ();
extern char *output_fp_move_double ();
extern char *output_block_move ();
extern char *output_delay_insn ();
#if 0
extern char *output_delayed_branch ();
#endif
extern void output_load_address ();
;;- Machine description for Intel 860 chip for GNU C compiler ;;- Machine description for Intel 860 chip for GNU C compiler
;; Copyright (C) 1989, 1990, 1997, 1998, 1999 Free Software Foundation, Inc. ;; Copyright (C) 1989, 1990, 97-99, 2000 Free Software Foundation, Inc.
;; This file is part of GNU CC. ;; This file is part of GNU CC.
...@@ -1247,6 +1247,7 @@ ...@@ -1247,6 +1247,7 @@
"* "*
{ {
if (GET_CODE (operands[0]) == MEM) if (GET_CODE (operands[0]) == MEM)
{
if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0))) if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0)))
{ {
if (! ((cc_prev_status.flags & CC_KNOW_HI_R31) if (! ((cc_prev_status.flags & CC_KNOW_HI_R31)
...@@ -1262,6 +1263,7 @@ ...@@ -1262,6 +1263,7 @@
} }
else else
return \"st.b %1,%0\"; return \"st.b %1,%0\";
}
return \"shl %?r0,%1,%0\"; return \"shl %?r0,%1,%0\";
}") }")
...@@ -1273,6 +1275,7 @@ ...@@ -1273,6 +1275,7 @@
"* "*
{ {
if (GET_CODE (operands[0]) == MEM) if (GET_CODE (operands[0]) == MEM)
{
if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0))) if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0)))
{ {
if (! ((cc_prev_status.flags & CC_KNOW_HI_R31) if (! ((cc_prev_status.flags & CC_KNOW_HI_R31)
...@@ -1288,6 +1291,7 @@ ...@@ -1288,6 +1291,7 @@
} }
else else
return \"st.b %1,%0\"; return \"st.b %1,%0\";
}
return \"shl %?r0,%1,%0\"; return \"shl %?r0,%1,%0\";
}") }")
...@@ -1299,6 +1303,7 @@ ...@@ -1299,6 +1303,7 @@
"* "*
{ {
if (GET_CODE (operands[0]) == MEM) if (GET_CODE (operands[0]) == MEM)
{
if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0))) if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0)))
{ {
if (! ((cc_prev_status.flags & CC_KNOW_HI_R31) if (! ((cc_prev_status.flags & CC_KNOW_HI_R31)
...@@ -1314,6 +1319,7 @@ ...@@ -1314,6 +1319,7 @@
} }
else else
return \"st.s %1,%0\"; return \"st.s %1,%0\";
}
return \"shl %?r0,%1,%0\"; return \"shl %?r0,%1,%0\";
}") }")
......
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