aarch64: Fix failure in cmpimm_branch_1.c

gcc.target/aarch64/cmpimm_branch_1.c started failing after Bernd's
fix to make combine take the costs of jumps into account
(g:391500af).  This is because the rtx costs
of *compare_condjump<GPI:mode> were higher than the costs
of the instructions it combines.

2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
	jump conditions for *compare_condjump<GPI:mode>.

gcc/ChangeLog

+2020-01-27  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
+	jump conditions for *compare_condjump<GPI:mode>.
+
 2020-01-27  David Malcolm  <dmalcolm@redhat.com>
 
 	PR analyzer/93276

gcc/config/aarch64/aarch64.c

@@ -11020,6 +11020,8 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2, int *cost, bool speed)
   rtx inner;
   rtx comparator;
   enum rtx_code cmpcode;
+  const struct cpu_cost_table *extra_cost
+    = aarch64_tune_params.insn_extra_cost;
 
   if (COMPARISON_P (op0))
     {
@@ -11054,8 +11056,17 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2, int *cost, bool speed)
 		    /* CBZ/CBNZ.  */
 		    *cost += rtx_cost (inner, VOIDmode, cmpcode, 0, speed);
 
-	        return true;
-	      }
+		  return true;
+		}
+	      if (register_operand (inner, VOIDmode)
+		  && aarch64_imm24 (comparator, VOIDmode))
+		{
+		  /* SUB and SUBS.  */
+		  *cost += COSTS_N_INSNS (2);
+		  if (speed)
+		    *cost += extra_cost->alu.arith * 2;
+		  return true;
+		}
 	    }
 	  else if (cmpcode == LT || cmpcode == GE)
 	    {