Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
e22856e8
Commit
e22856e8
authored
May 18, 1996
by
Jim Wilson
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
(prepare_move_operands): If source is r0, and dest is reg+reg
MEM, then copy source to a pseudo-reg. From-SVN: r12036
parent
a1a0806a
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
17 additions
and
5 deletions
+17
-5
gcc/config/sh/sh.c
+17
-5
No files found.
gcc/config/sh/sh.c
View file @
e22856e8
...
...
@@ -315,11 +315,23 @@ prepare_move_operands (operands, mode)
rtx
operands
[];
enum
machine_mode
mode
;
{
/* Copy the source to a register if both operands aren't registers. */
if
(
!
reload_in_progress
&&
!
reload_completed
&&
!
register_operand
(
operands
[
0
],
mode
)
&&
!
register_operand
(
operands
[
1
],
mode
))
operands
[
1
]
=
copy_to_mode_reg
(
mode
,
operands
[
1
]);
if
(
!
reload_in_progress
&&
!
reload_completed
)
{
/* Copy the source to a register if both operands aren't registers. */
if
(
!
register_operand
(
operands
[
0
],
mode
)
&&
!
register_operand
(
operands
[
1
],
mode
))
operands
[
1
]
=
copy_to_mode_reg
(
mode
,
operands
[
1
]);
/* This case can happen while generating code to move the result
of a library call to the target. Reject `st r0,@(rX,rY)' because
reload will fail to find a spill register for rX, since r0 is already
being used for the source. */
else
if
(
GET_CODE
(
operands
[
1
])
==
REG
&&
REGNO
(
operands
[
1
])
==
0
&&
GET_CODE
(
operands
[
0
])
==
MEM
&&
GET_CODE
(
XEXP
(
operands
[
0
],
0
))
==
PLUS
&&
GET_CODE
(
XEXP
(
XEXP
(
operands
[
0
],
0
),
1
))
==
REG
)
operands
[
1
]
=
copy_to_mode_reg
(
mode
,
operands
[
1
]);
}
return
0
;
}
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment