Commit e2265be0 by Kaz Kojima Committed by Nick Clifton

m32r-protos.h (m32r_expand_epilogue): Declare it.

* config/m32r/m32r-protos.h (m32r_expand_epilogue): Declare it.
* config/m32r/m32r.c (m32r_setup_incoming_varargs): Use gen_frame_mem.
  (m32r_compute_frame_size): Use unsigned for regno.
  (m32r_reload_lr): Use gen_frame_mem.
  (pop): New.
  (m32r_output_function_epilogue): Don't output the function epilogue textually here.
  (m32r_expand_epilogue): New.
  (direct_return): Return false if the function has the interrupt attribute.
  (m32r_hard_regno_rename_ok): Remove code for the textual epilogue.
* config/m32r/m32r.md (epilogue): New expander.
  (return_lr, return_rte): New insns.
  (return): Make it expander.
  (return_normal): New expander.

From-SVN: r120904
parent bfcb9121
2007-01-18 Kaz Kojima <kkojima@rr.iij4u.or.jp>
* config/m32r/m32r-protos.h (m32r_expand_epilogue): Declare it.
* config/m32r/m32r.c (m32r_setup_incoming_varargs): Use gen_frame_mem.
(m32r_compute_frame_size): Use unsigned for regno.
(m32r_reload_lr): Use gen_frame_mem.
(pop): New.
(m32r_output_function_epilogue): Don't output the function epilogue
textually here.
(m32r_expand_epilogue): New.
(direct_return): Return false if the function has the interrupt
attribute.
(m32r_hard_regno_rename_ok): Remove code for the textual epilogue.
* config/m32r/m32r.md (epilogue): New expander.
(return_lr, return_rte): New insns.
(return): Make it expander.
(return_normal): New expander.
2007-01-18 Josh Conner <jconner@apple.com> 2007-01-18 Josh Conner <jconner@apple.com>
PR target/30485 PR target/30485
......
/* Prototypes for m32r.c functions used in the md file & elsewhere. /* Prototypes for m32r.c functions used in the md file & elsewhere.
Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007
Free Software Foundation, Inc. Free Software Foundation, Inc.
This file is part of GCC. This file is part of GCC.
...@@ -27,6 +27,7 @@ extern void m32r_init (void); ...@@ -27,6 +27,7 @@ extern void m32r_init (void);
extern void m32r_init_expanders (void); extern void m32r_init_expanders (void);
extern unsigned m32r_compute_frame_size (int); extern unsigned m32r_compute_frame_size (int);
extern void m32r_expand_prologue (void); extern void m32r_expand_prologue (void);
extern void m32r_expand_epilogue (void);
extern int direct_return (void); extern int direct_return (void);
extern void m32r_load_pic_register (void); extern void m32r_load_pic_register (void);
......
;; Machine description of the Renesas M32R cpu for GNU C compiler ;; Machine description of the Renesas M32R cpu for GNU C compiler
;; Copyright (C) 1996, 1997, 1998, 1999, 2001, 2003, 2004, 2005 ;; Copyright (C) 1996, 1997, 1998, 1999, 2001, 2003, 2004, 2005,
; Free Software Foundation, Inc. ; 2007 Free Software Foundation, Inc.
;; This file is part of GCC. ;; This file is part of GCC.
...@@ -200,7 +200,7 @@ ...@@ -200,7 +200,7 @@
(include "predicates.md") (include "predicates.md")
;; Expand prologue as RTL ;; Expand prologue as RTL
(define_expand "prologue" (define_expand "prologue"
[(const_int 1)] [(const_int 1)]
...@@ -211,6 +211,16 @@ ...@@ -211,6 +211,16 @@
DONE; DONE;
}") }")
;; Expand epilogue as RTL
(define_expand "epilogue"
[(return)]
""
"
{
m32r_expand_epilogue ();
emit_jump_insn (gen_return_normal ());
DONE;
}")
;; Move instructions. ;; Move instructions.
;; ;;
...@@ -1166,7 +1176,7 @@ ...@@ -1166,7 +1176,7 @@
;; Compare instructions. ;; Compare instructions.
;; This controls RTL generation and register allocation. ;; This controls RTL generation and register allocation.
;; We generate RTL for comparisons and branches by having the cmpxx ;; We generate RTL for comparisons and branches by having the cmpxx
;; patterns store away the operands. Then the bcc patterns ;; patterns store away the operands. Then the bcc patterns
;; emit RTL for both the compare and the branch. ;; emit RTL for both the compare and the branch.
;; ;;
...@@ -1795,7 +1805,7 @@ ...@@ -1795,7 +1805,7 @@
(set (match_dup 0) (set (match_dup 0)
(ne:SI (reg:CC 17) (const_int 0)))] (ne:SI (reg:CC 17) (const_int 0)))]
"") "")
(define_expand "slt" (define_expand "slt"
[(match_operand:SI 0 "register_operand" "")] [(match_operand:SI 0 "register_operand" "")]
"" ""
...@@ -2270,13 +2280,47 @@ ...@@ -2270,13 +2280,47 @@
[(set_attr "type" "uncond_branch") [(set_attr "type" "uncond_branch")
(set_attr "length" "2")]) (set_attr "length" "2")])
(define_insn "return" (define_insn "return_lr"
[(return)] [(parallel [(return) (use (reg:SI 14))])]
"direct_return ()" ""
"jmp lr" "jmp lr"
[(set_attr "type" "uncond_branch") [(set_attr "type" "uncond_branch")
(set_attr "length" "2")]) (set_attr "length" "2")])
(define_insn "return_rte"
[(return)]
""
"rte"
[(set_attr "type" "uncond_branch")
(set_attr "length" "2")])
(define_expand "return"
[(return)]
"direct_return ()"
"
{
emit_jump_insn (gen_return_lr ());
DONE;
}")
(define_expand "return_normal"
[(return)]
"!direct_return ()"
"
{
enum m32r_function_type fn_type;
fn_type = m32r_compute_function_type (current_function_decl);
if (M32R_INTERRUPT_P (fn_type))
{
emit_jump_insn (gen_return_rte ());
DONE;
}
emit_jump_insn (gen_return_lr ());
DONE;
}")
(define_expand "tablejump" (define_expand "tablejump"
[(parallel [(set (pc) (match_operand 0 "register_operand" "r")) [(parallel [(set (pc) (match_operand 0 "register_operand" "r"))
(use (label_ref (match_operand 1 "" "")))])] (use (label_ref (match_operand 1 "" "")))])]
...@@ -2367,7 +2411,7 @@ ...@@ -2367,7 +2411,7 @@
(match_operand 2 "" ""))) (match_operand 2 "" "")))
(clobber (reg:SI 14))])] (clobber (reg:SI 14))])]
"" ""
" "
{ {
if (flag_pic) if (flag_pic)
current_function_uses_pic_offset_table = 1; current_function_uses_pic_offset_table = 1;
......
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