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lvzhengyang
riscv-gcc-1
Commits
e1b027fa
Commit
e1b027fa
authored
Jan 04, 1993
by
Richard Stallman
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(perform_*): Rename macro args to arg0, arg1.
From-SVN: r3084
parent
63671b34
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1 changed file
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17 additions
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14 deletions
+17
-14
gcc/config/i386/386bsd.h
+17
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gcc/config/i386/386bsd.h
View file @
e1b027fa
...
@@ -64,50 +64,53 @@
...
@@ -64,50 +64,53 @@
call libgcc for these functions. But programs might be linked with
call libgcc for these functions. But programs might be linked with
code compiled by gcc 1, and then these will be used. */
code compiled by gcc 1, and then these will be used. */
#define perform_udivsi3(a,b) \
/* The arg names used to be a and b, but `a' appears inside strings
and that confuses non-ANSI cpp. */
#define perform_udivsi3(arg0,arg1) \
{ \
{ \
register int dx asm("dx"); \
register int dx asm("dx"); \
register int ax asm("ax"); \
register int ax asm("ax"); \
\
\
dx = 0; \
dx = 0; \
ax = a; \
ax = a
rg0
; \
asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
b), "d" (dx));
\
asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
arg1), "d" (dx));
\
return ax; \
return ax; \
}
}
#define perform_divsi3(a
,b)
\
#define perform_divsi3(a
rg0,arg1)
\
{ \
{ \
register int dx asm("dx"); \
register int dx asm("dx"); \
register int ax asm("ax"); \
register int ax asm("ax"); \
\
\
ax = a; \
ax = a
rg0
; \
asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
b));
\
asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
arg1));
\
return ax; \
return ax; \
}
}
#define perform_umodsi3(a
,b)
\
#define perform_umodsi3(a
rg0,arg1)
\
{ \
{ \
register int dx asm("dx"); \
register int dx asm("dx"); \
register int ax asm("ax"); \
register int ax asm("ax"); \
\
\
dx = 0; \
dx = 0; \
ax = a; \
ax = a
rg0
; \
asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
b), "d" (dx));
\
asm ("divl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
arg1), "d" (dx));
\
return dx; \
return dx; \
}
}
#define perform_modsi3(a
,b)
\
#define perform_modsi3(a
rg0,arg1)
\
{ \
{ \
register int dx asm("dx"); \
register int dx asm("dx"); \
register int ax asm("ax"); \
register int ax asm("ax"); \
\
\
ax = a; \
ax = a
rg0
; \
asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
b));
\
asm ("cltd\n\tidivl %3" : "=a" (ax), "=d" (dx) : "a" (ax), "g" (
arg1));
\
return dx; \
return dx; \
}
}
#define perform_fixdfsi(a) \
#define perform_fixdfsi(a
rg0
) \
{ \
{ \
auto unsigned short ostatus; \
auto unsigned short ostatus; \
auto unsigned short nstatus; \
auto unsigned short nstatus; \
...
@@ -122,7 +125,7 @@
...
@@ -122,7 +125,7 @@
asm volatile ("fnstcw %0" : "=m" (ostatus)); \
asm volatile ("fnstcw %0" : "=m" (ostatus)); \
nstatus = ostatus | 0x0c00; \
nstatus = ostatus | 0x0c00; \
asm volatile ("fldcw %0" :
/* no outputs */
: "m" (nstatus)); \
asm volatile ("fldcw %0" :
/* no outputs */
: "m" (nstatus)); \
tmp = a; \
tmp = a
rg0
; \
asm volatile ("fldl %0" :
/* no outputs */
: "m" (tmp)); \
asm volatile ("fldl %0" :
/* no outputs */
: "m" (tmp)); \
asm volatile ("fistpl %0" : "=m" (ret)); \
asm volatile ("fistpl %0" : "=m" (ret)); \
asm volatile ("fldcw %0" :
/* no outputs */
: "m" (ostatus)); \
asm volatile ("fldcw %0" :
/* no outputs */
: "m" (ostatus)); \
...
...
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