Commit e1813255 by Sandra Loosemore Committed by Sandra Loosemore

invoke.texi (-fira-* options): Copy-edit.

2012-02-18  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* doc/invoke.texi (-fira-* options): Copy-edit.
	(ira-* parameters): Copy-edit.

From-SVN: r184373
parent d2c5dbf2
2012-02-18 Sandra Loosemore <sandra@codesourcery.com>
* doc/invoke.texi (-fira-* options): Copy-edit.
(ira-* parameters): Copy-edit.
2012-02-17 Sandra Loosemore <sandra@codesourcery.com> 2012-02-17 Sandra Loosemore <sandra@codesourcery.com>
* doc/invoke.texi: Minor copy-edits to bring into conformance with * doc/invoke.texi: Minor copy-edits to bring into conformance with
......
...@@ -6759,56 +6759,65 @@ optimization. ...@@ -6759,56 +6759,65 @@ optimization.
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}. Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
@item -fira-algorithm=@var{algorithm} @item -fira-algorithm=@var{algorithm}
Use specified coloring algorithm for the integrated register Use the specified coloring algorithm for the integrated register
allocator. The @var{algorithm} argument should be @code{priority} or allocator. The @var{algorithm} argument can be @samp{priority}, which
@code{CB}. The first algorithm specifies Chow's priority coloring, specifies Chow's priority coloring, or @samp{CB}, which specifies
the second one specifies Chaitin-Briggs coloring. The second Chaitin-Briggs coloring. Chaitin-Briggs coloring is not implemented
algorithm can be unimplemented for some architectures. If it is for all architectures, but for those targets that do support it, it is
implemented, it is the default because Chaitin-Briggs coloring as a the default because it generates better code.
rule generates a better code.
@item -fira-region=@var{region} @item -fira-region=@var{region}
Use specified regions for the integrated register allocator. The Use specified regions for the integrated register allocator. The
@var{region} argument should be one of @code{all}, @code{mixed}, or @var{region} argument should be one of the following:
@code{one}. The first value means using all loops as register
allocation regions, the second value which is enabled by default when @table @samp
compiling with optimization for speed (@option{-O}, @option{-O2},
@dots{}) means using all loops except for loops with small register @item all
pressure as the regions, and third one which is enabled by default for Use all loops as register allocation regions.
@option{-Os} or @option{-O0} means using all function as a single This can give the best results for machines with a small and/or
region. The first value can give best result for machines with small irregular register set.
size and irregular register set, the third one results in faster and
generates decent code and the smallest size code, and the second value @item mixed
usually give the best results in most cases and for most Use all loops except for loops with small register pressure
architectures. as the regions. This value usually gives
the best results in most cases and for most architectures,
and is enabled by default when compiling with optimization for speed
(@option{-O}, @option{-O2}, @dots{}).
@item one
Use all functions as a single region.
This typically results in the smallest code size, and is enabled by default for
@option{-Os} or @option{-O0}.
@end table
@item -fira-loop-pressure @item -fira-loop-pressure
@opindex fira-loop-pressure @opindex fira-loop-pressure
Use IRA to evaluate register pressure in loops for decision to move Use IRA to evaluate register pressure in loops for decisions to move
loop invariants. Usage of this option usually results in generation loop invariants. This option usually results in generation
of faster and smaller code on machines with big register files (>= 32 of faster and smaller code on machines with large register files (>= 32
registers) but it can slow compiler down. registers), but it can slow the compiler down.
This option is enabled at level @option{-O3} for some targets. This option is enabled at level @option{-O3} for some targets.
@item -fno-ira-share-save-slots @item -fno-ira-share-save-slots
@opindex fno-ira-share-save-slots @opindex fno-ira-share-save-slots
Switch off sharing stack slots used for saving call used hard Disable sharing of stack slots used for saving call-used hard
registers living through a call. Each hard register will get a registers living through a call. Each hard register gets a
separate stack slot and as a result function stack frame will be separate stack slot, and as a result function stack frames are
bigger. larger.
@item -fno-ira-share-spill-slots @item -fno-ira-share-spill-slots
@opindex fno-ira-share-spill-slots @opindex fno-ira-share-spill-slots
Switch off sharing stack slots allocated for pseudo-registers. Each Disable sharing of stack slots allocated for pseudo-registers. Each
pseudo-register that did not get a hard register will get a separate pseudo-register that does not get a hard register gets a separate
stack slot and as a result function stack frame will be bigger. stack slot, and as a result function stack frames are larger.
@item -fira-verbose=@var{n} @item -fira-verbose=@var{n}
@opindex fira-verbose @opindex fira-verbose
Set up how verbose dump file for the integrated register allocator Control the verbosity of the dump file for the integrated register allocator.
will be. Default value is 5. If the value is greater or equal to 10, The default value is 5. If the value @var{n} is greater or equal to 10,
the dump file will be stderr as if the value were @var{n} minus 10. the dump output is sent to stderr using the same format as @var{n} minus 10.
@item -fdelayed-branch @item -fdelayed-branch
@opindex fdelayed-branch @opindex fdelayed-branch
...@@ -9103,28 +9112,28 @@ function will not be done and optimizations depending on it will ...@@ -9103,28 +9112,28 @@ function will not be done and optimizations depending on it will
be disabled. The default maximum SCC size is 10000. be disabled. The default maximum SCC size is 10000.
@item ira-max-loops-num @item ira-max-loops-num
IRA uses a regional register allocation by default. If a function IRA uses regional register allocation by default. If a function
contains loops more than number given by the parameter, only at most contains more loops than the number given by this parameter, only at most
given number of the most frequently executed loops will form regions the given number of the most frequently-executed loops form regions
for the regional register allocation. The default value of the for regional register allocation. The default value of the
parameter is 100. parameter is 100.
@item ira-max-conflict-table-size @item ira-max-conflict-table-size
Although IRA uses a sophisticated algorithm of compression conflict Although IRA uses a sophisticated algorithm to compress the conflict
table, the table can be still big for huge functions. If the conflict table, the table can still require excessive amounts of memory for
table for a function could be more than size in MB given by the huge functions. If the conflict table for a function could be more
parameter, the conflict table is not built and faster, simpler, and than the size in MB given by this parameter, the register allocator
lower quality register allocation algorithm will be used. The instead uses a faster, simpler, and lower-quality
algorithm do not use pseudo-register conflicts. The default value of algorithm that does not require building a pseudo-register conflict table.
the parameter is 2000. The default value of the parameter is 2000.
@item ira-loop-reserved-regs @item ira-loop-reserved-regs
IRA can be used to evaluate more accurate register pressure in loops IRA can be used to evaluate more accurate register pressure in loops
for decision to move loop invariants (see @option{-O3}). The number for decisions to move loop invariants (see @option{-O3}). The number
of available registers reserved for some other purposes is described of available registers reserved for some other purposes is given
by this parameter. The default value of the parameter is 2 which is by this parameter. The default value of the parameter is 2, which is
minimal number of registers needed for execution of typical the minimal number of registers needed by typical instructions.
instruction. This value is the best found from numerous experiments. This value is the best found from numerous experiments.
@item loop-invariant-max-bbs-in-loop @item loop-invariant-max-bbs-in-loop
Loop invariant motion can be very expensive, both in compilation time and Loop invariant motion can be very expensive, both in compilation time and
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