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riscv-gcc-1
Commit e13f6154 by Richard Henderson
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i370.c (mvs_add_label): Change spacing for coding conventions. 

        * i370.c (mvs_add_label): Change spacing for coding conventions.
        * i370.h (ASM_OUTPUT_CASE_LABEL): Change to the data CSECT for the
        outputing case vectors.
        (ASM_OUTPUT_CASE_END): New, put assembler back into code CSECT.
        (ASM_OUTPUT_ADDR_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT): Remove page check,
        since vector in in the data CSECT.
        (ASM_OUTPUT_REG_POP, ASM_OUTPUT_REG_PUSH): Restore to correct operation.        * i370.md (Many patterns): Put the length in the XL directives.
        (movdi): Put back STM and MVC in definition.
        (floatsidf2): Correct TARGET_ELF_ABI pattern and add back the LE370
        pattern using the TCA.
        * oe.h (CPP_SPEC): Added to allow trigraphs.
        * xm-oe.h (HOST_BITS_PER_LONGLONG): Change to 32. IBM's compiler does
        not support the "long long" type.

From-SVN: r33191
parent 954869eb
Showing with 49 additions and 48 deletions
gcc/config/i370/i370.c
......@@ -645,7 +645,7 @@ mvs_add_label (id)
fwd_distance = lp->label_last_ref - lp->label_addr;
if (mvs_page_code + 2*fwd_distance + mvs_page_lit < 4060) return;
if (mvs_page_code + 2 * fwd_distance + mvs_page_lit < 4060) return;
mvs_need_base_reload ++;
}
......
gcc/config/i370/i370.h
......@@ -1160,23 +1160,29 @@ enum reg_class
fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
}
/* Generate case label. */
/* hack alert -- I don't get it ... what if its a really big case label?
* wouldn't we have to say label_emitted also ?? */
/* Generate case label. For HLASM we can change to the data CSECT
and put the vectors out of the code body. The assembler just
concatenates CSECTs with the same name. */
#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
fprintf (FILE, "\tDS\t0F\n"); \
fprintf (FILE,"\tCSECT\n"); \
fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
/* Put the CSECT back to the code body */
#define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
assemble_name (FILE, mvs_function_name); \
fputs ("\tCSECT\n", FILE);
/* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
mvs_check_page (FILE, 4, 0); \
fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
mvs_check_page (FILE, 4, 0); \
fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
/* This is how to output an insn to push a register on the stack.
......@@ -1188,7 +1194,7 @@ enum reg_class
#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
mvs_check_page (FILE, 8, 4); \
fprintf (FILE, "\tSXXX\t13,=F'4'\n\tST\t%s,%d(13)\n", \
fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
reg_names[REGNO], STACK_POINTER_OFFSET)
/* This is how to output an insn to pop a register from the stack.
......@@ -1196,13 +1202,9 @@ enum reg_class
#define ASM_OUTPUT_REG_POP(FILE, REGNO) \
mvs_check_page (FILE, 8, 0); \
fprintf (FILE, "\tL\t%s,%d(13)\n\tLAXXX\t13,4(13)\n", \
fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
reg_names[REGNO], STACK_POINTER_OFFSET)
/* TBD: hack alert XXX these two float point macros print horribly
incorrect things when run in cross-compiler mode. Thats's because
in cross-compiler mode, the VALUE is not really a double. See below,
in the ELF section, for the correct implementation. */
/* This is how to output an assembler line defining a `double' constant. */
#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
fprintf (FILE, "\tDC\tD'%.18G'\n", (VALUE))
......
gcc/config/i370/i370.md
......@@ -170,7 +170,7 @@
{
/* an unsigned compare to zero is always zero/not-zero... */
mvs_check_page (0, 4, 4);
return \"N %0,=X'000000FF'\";
return \"N %0,=XL4'000000FF'\";
}
mvs_check_page (0, 4, 0);
return \"CLI %0,0\";
......@@ -189,7 +189,7 @@
{
/* an unsigned compare to zero is always zero/not-zero... */
mvs_check_page (0, 4, 4);
return \"N %0,=X'000000FF'\";
return \"N %0,=XL4'000000FF'\";
}
mvs_check_page (0, 8, 0);
return \"SLL %0,24\;SRA %0,24\";
......@@ -348,7 +348,7 @@
if (GET_CODE (operands[1]) == CONST_INT)
{
mvs_check_page (0, 4, 1);
return \"CLM %0,1,=X'%X1'\";
return \"CLM %0,1,=XL1'%X1'\";
}
mvs_check_page (0, 4, 0);
return \"CLM %0,1,%1\";
......@@ -359,7 +359,7 @@
if (REG_P (operands[1]))
{
mvs_check_page (0, 4, 1);
return \"CLM %1,1,=X'%X0'\";
return \"CLM %1,1,=XL1'%X0'\";
}
mvs_check_page (0, 4, 0);
return \"CLI %1,%B0\";
......@@ -394,7 +394,7 @@
if (GET_CODE (operands[1]) == CONST_INT)
{
mvs_check_page (0, 4, 1);
return \"CLM %0,1,=X'%X1'\";
return \"CLM %0,1,=XL1'%X1'\";
}
if (!(REG_P (operands[1])))
{
......@@ -648,9 +648,7 @@ check_label_emit ();
else if (REG_P (operands[1]))
{
mvs_check_page (0, 4, 0);
/* can't use stm otherwise stm r6,r7,0(r10,r13) can happen */
return \"STM %1,%N1,%0\";
/* return \"ST %1,%0\;ST %N1,4+%0\"; */
}
mvs_check_page (0, 6, 0);
return \"MVC %O0(8,%R0),%W1\";
......@@ -706,17 +704,8 @@ check_label_emit ();
mvs_check_page (0, 4, 0);
return \"STD %1,%0\";
}
else if (REG_P (operands[1]))
{
/* hack alert -- for some reason, %N0 doesn't work
* when the mem ref is e.g. 168(r13,r1) ...
* add 4 and pray for the best .. */
mvs_check_page (0, 8, 0);
return \"ST %1,%0\;ST %N1,4+%N0\";
}
/* this is almost certainly not what is desired, let it break ... */
mvs_check_page (0, 8, 0);
return \"xxxST %1,%0\;ST %N1,%N0\";
mvs_check_page (0, 4, 0);
return \"STM %1,%N1,%0\";
}"
[(set_attr "length" "8")]
)
......@@ -740,16 +729,15 @@ check_label_emit ();
if (REG_P (operands[0]))
{
mvs_check_page (0, 8, 0);
return \"L %0,%1\;L %N0,4+%N1\";
return \"LM %0,%N0,%1\";
}
else if (REG_P (operands[1]))
{
mvs_check_page (0, 8, 0);
return \"ST %1,%0\;ST %N1,4+%N0\";
return \"STM %1,%N1,%0\";
}
mvs_check_page (0, 6, 0);
/* should never get here ... */
return \"xxxxxxMVC %O0(8,%R0),%W1\";
return \"MVC %O0(8,%R0),%1\";
}"
[(set_attr "length" "8")]
)
......@@ -1200,7 +1188,7 @@ check_label_emit ();
return \"STM %1,%N1,%0\";
}
mvs_check_page (0, 6, 0);
return \"MVC %O0(8,%R0),%W1\";
return \"MVC %O0(8,%R0),%1\";
}"
[(set_attr "length" "12")]
)
......@@ -1715,7 +1703,7 @@ check_label_emit ();
/* AND only sets zero/not-zero bits not the arithmetic bits ... */
CC_STATUS_INIT;
mvs_check_page (0, 4, 4);
return \"N %1,=X'0000FFFF'\";
return \"N %1,=XL4'0000FFFF'\";
}"
[(set_attr "length" "4")]
)
......@@ -1736,7 +1724,7 @@ check_label_emit ();
/* AND only sets zero/not-zero bits not the arithmetic bits ... */
CC_STATUS_INIT;
mvs_check_page (0, 4, 4);
return \"N %0,=X'000000FF'\";
return \"N %0,=XL4'000000FF'\";
}
if (GET_CODE (operands[1]) == CONST_INT)
{
......@@ -1766,7 +1754,7 @@ check_label_emit ();
/* AND only sets zero/not-zero bits not the arithmetic bits ... */
CC_STATUS_INIT;
mvs_check_page (0, 4, 4);
return \"N %0,=X'000000FF'\";
return \"N %0,=XL4'000000FF'\";
}
if (GET_CODE (operands[1]) == CONST_INT)
{
......@@ -1830,6 +1818,8 @@ check_label_emit ();
;
; floatsidf2 instruction pattern(s).
;
; LE/370 mode uses the float field of the TCA.
;
(define_insn "floatsidf2"
[(set (match_operand:DF 0 "general_operand" "=f")
......@@ -1839,10 +1829,15 @@ check_label_emit ();
{
check_label_emit ();
CC_STATUS_INIT;
#ifdef TARGET_ELF_ABI
mvs_check_page (0, 22, 12);
return \"MVC 140(4,13),=XL4'4E000000'\;ST %1,144(,13)\;XI 144(13),128\;LD %0,140(,13)\;SD %0,=XL8'4E00000080000000'\";
#else
mvs_check_page (0, 16, 8);
return \"ST %1,144(,13)\;XI 144(13),128\;LD %0,140(,13)\;SD %0,=XL8'4E00000080000000'\";
return \"ST %1,508(,12)\;XI 508(12),128\;LD %0,504(,12)\;SD %0,=XL8'4E00000080000000'\";
#endif
}"
[(set_attr "length" "16")]
[(set_attr "length" "22")]
)
;
......@@ -2419,7 +2414,7 @@ check_label_emit ();
/* XXX trouble. Below we generate some rtx's that model what
* is really supposed to happen with multiply on the 370/390
* hardware, and that is all well & god. However, during optimization
* hardware, and that is all well & good. However, during optimization
* it can happen that the two operands are exchanged (after all,
* multiplication is commutitive), in which case the doubleword
* ends up in memory and everything is hosed. The gen_reg_rtx
......@@ -3579,7 +3574,7 @@ check_label_emit ();
return \"X %0,=F'-1'\";
}
mvs_check_page (0, 6, 4);
return \"XC %O0(2,%R0),=X'FFFF'\";
return \"XC %O0(2,%R0),=XL4'FFFF'\";
}"
[(set_attr "length" "6")]
)
......@@ -3867,10 +3862,10 @@ check_label_emit ();
if (REG_P (operands[2]))
{
mvs_check_page (0, 8, 4);
return \"N %0,=X'0000FFFF'\;SRL %0,0(%2)\";
return \"N %0,=XL4'0000FFFF'\;SRL %0,0(%2)\";
}
mvs_check_page (0, 8, 4);
return \"N %0,=X'0000FFFF'\;SRL %0,%c2\";
return \"N %0,=XL4'0000FFFF'\;SRL %0,%c2\";
}"
[(set_attr "length" "8")]
)
......@@ -3890,8 +3885,8 @@ check_label_emit ();
CC_STATUS_INIT; /* AND sets the CC but not how we want it */
mvs_check_page (0, 8, 4);
if (REG_P (operands[2]))
return \"N %0,=X'000000FF'\;SRL %0,0(%2)\";
return \"N %0,=X'000000FF'\;SRL %0,%c2\";
return \"N %0,=XL4'000000FF'\;SRL %0,0(%2)\";
return \"N %0,=XL4'000000FF'\;SRL %0,%c2\";
}"
[(set_attr "length" "8")]
)
......
gcc/config/i370/oe.h
......@@ -29,6 +29,10 @@ Boston, MA 02111-1307, USA. */
#define TARGET_EBCDIC 1
#define TARGET_HLASM 1
/* Options for the preprocessor for this target machine. */
#define CPP_SPEC "-trigraphs"
/* Options for this target machine. */
#define LIB_SPEC ""
......
gcc/config/i370/xm-oe.h
......@@ -34,7 +34,7 @@ Boston, MA 02111-1307, USA. */
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
#define HOST_BITS_PER_LONGLONG 32
#define HOST_FLOAT_FORMAT IBM_FLOAT_FORMAT
#define HOST_EBCDIC 1
......
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