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lvzhengyang
riscv-gcc-1
Commits
e0d75375
Commit
e0d75375
authored
Jul 29, 1998
by
Nick Clifton
Committed by
Nick Clifton
Jul 29, 1998
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remove earlyclobber constraint from extendqisi2_insn
From-SVN: r21471
parent
53fdbb3b
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13 additions
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3 deletions
+13
-3
gcc/ChangeLog
+5
-0
gcc/config/arm/thumb.md
+8
-3
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gcc/ChangeLog
View file @
e0d75375
Wed Jul 29 11:47:10 1998 Nick Clifton <nickc@cygnus.com>
* config/arm/thumb.md (extendqisi2_insn): Remove earlyclobber
constraint from second alternative.
Tue Jul 28 23:29:04 1998 Jason Merrill <jason@yorick.cygnus.com>
* configure.in: Fix --without/--disable cases for local-prefix,
...
...
gcc/config/arm/thumb.md
View file @
e0d75375
...
...
@@ -470,7 +470,7 @@
")
(define_insn "
*
extendqisi2_insn"
[
(set (match_operand:SI 0 "register_operand" "=l,
&
l")
[
(set (match_operand:SI 0 "register_operand" "=l,l")
(sign_extend:SI (match_operand:QI 1 "memory_operand" "V,m")))]
""
"
*
...
...
@@ -484,16 +484,21 @@
{
ops
[
1
]
= XEXP (XEXP (operands
[
1
]
, 0), 0);
ops
[
2
]
= XEXP (XEXP (operands
[
1
]
, 0), 1);
output_asm_insn (
\"
ldrsb
\\
t%0,
[
%1, %2
]
\"
, ops);
}
else if (REGNO (operands
[
0
]
) == REGNO (XEXP (operands
[
1
]
, 0)))
{
output_asm_insn (
\"
ldrb
\\
t%0,
[
%0, #0
]
\;
lsl
\\
t%0, %0, #24
\;
asr
\\
t%0, %0, #24
\"
, ops);
}
else
{
ops
[
1
]
= XEXP (operands
[
1
]
, 0);
ops
[
2
]
= const0_rtx;
output_asm_insn (
\"
mov
\\
t%0, %2
\;
ldrsb
\\
t%0,
[
%1, %0
]
\"
, ops);
}
output_asm_insn (
\"
mov
\\
t%0, %2
\;
ldrsb
\\
t%0,
[
%1, %0
]
\"
, ops);
return
\"\"
;
}"
[
(set_attr "length" "2,
4
")
]
)
[
(set_attr "length" "2,
6
")
]
)
;; We don't really have extzv, but defining this using shifts helps
;; to reduce register pressure later on.
...
...
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