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riscv-gcc-1
Commit e0d1958f by Richard Henderson Committed by Richard Henderson
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mn10300: Use reg_or_am33_const_operand in mulsi3. 

From-SVN: r169017
parent d6be7c36
Showing with 13 additions and 8 deletions
gcc/ChangeLog
2011-01-19 Richard Henderson <rth@redhat.com>
* config/mn10300/mn10300.md (mulsi3): Use reg_or_am33_const_operand.
(*mulsi3): Likewise.
2011-01-19 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* config/spu/spu.h (MOVE_RATIO): Return 4 in the !speed case.
......
gcc/config/mn10300/mn10300.md
......@@ -1013,19 +1013,19 @@
)
(define_expand "mulsi3"
[(parallel [(set (match_operand:SI 0 "register_operand" "")
(mult:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonmemory_operand" "")))
(clobber (match_scratch:SI 3 ""))
[(parallel [(set (match_operand:SI 0 "register_operand")
(mult:SI (match_operand:SI 1 "register_operand")
(match_operand:SI 2 "reg_or_am33_const_operand")))
(clobber (match_scratch:SI 3))
(clobber (reg:CC CC_REG))])]
""
)
(define_insn "*mulsi3"
[(set (match_operand:SI 0 "register_operand" "=D, r,r")
(mult:SI (match_operand:SI 2 "register_operand" "%0, 0,r")
(match_operand:SI 3 "nonmemory_operand" " D,ri,r")))
(clobber (match_scratch:SI 1 "=z, z,r"))
[(set (match_operand:SI 0 "register_operand" "=D, r,r")
(mult:SI (match_operand:SI 2 "register_operand" "%0, 0,r")
(match_operand:SI 3 "reg_or_am33_const_operand" " D,ri,r")))
(clobber (match_scratch:SI 1 "=z, z,r"))
(clobber (reg:CC CC_REG))]
""
{
......
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