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Commit e0be3321 by Claudiu Zissulescu Committed by Claudiu Zissulescu
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[ARC] Cleanup sdata handling. 

Clean up how we handle small data load/store operations.

gcc/
2018-01-18  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc-protos.h (prepare_extend_operands): Remove.
	(small_data_pattern): Likewise.
	(arc_rewrite_small_data): Likewise.
	* config/arc/arc.c (LEGITIMATE_SMALL_DATA_OFFSET_P): Remove.
	(LEGITIMATE_SMALL_DATA_ADDRESS_P): Likewise.
	(get_symbol_alignment): New function.
	(legitimate_small_data_address_p): Likewise.
	(legitimate_scaled_address): Update, call
	legitimate_small_data_address_p.
	(output_sdata): New static variable.
	(arc_print_operand): Update how we handle small data operands.
	(arc_print_operand_address): Likewise.
	(arc_legitimate_address_p): Update, use
	legitimate_small_data_address_p.
	(arc_rewrite_small_data_p): Remove.
	(arc_rewrite_small_data_1): Likewise.
	(arc_rewrite_small_data): Likewise.
	(small_data_pattern): Likewise.
	(compact_sda_memory_operand): Update to use
	legitimate_small_data_address_p and get_symbol_alignment.
	(prepare_move_operands): Don't rewite sdata pattern.
	(prepare_extend_operands): Remove.
	* config/arc/arc.md (zero_extendqihi2): Don't rewrite sdata
	pattern.
	(zero_extendqisi2): Likewise.
	(zero_extendhisi2): Likewise.
	(extendqihi2): Likewise.
	(extendqisi2): Likewise.
	(extendhisi2): Likewise.
	(addsi3): Likewise.
	(subsi3): Likewise.
	(andsi3): Likewise.
	* config/arc/constraints.md (Usd): Change it to memory constraint.

gcc/testsuite
2018-01-18  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/interrupt-8.c: Update test.
	* gcc.target/arc/loop-4.c: Likewise.
	* gcc.target/arc/loop-hazard-1.c: Likewise.
	* gcc.target/arc/sdata-3.c: Likewise.

From-SVN: r259763
parent 2295aa75
Showing with 60 additions and 32 deletions
gcc/ChangeLog
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (prepare_extend_operands): Remove.
(small_data_pattern): Likewise.
(arc_rewrite_small_data): Likewise.
* config/arc/arc.c (LEGITIMATE_SMALL_DATA_OFFSET_P): Remove.
(LEGITIMATE_SMALL_DATA_ADDRESS_P): Likewise.
(get_symbol_alignment): New function.
(legitimate_small_data_address_p): Likewise.
(legitimate_scaled_address): Update, call
legitimate_small_data_address_p.
(output_sdata): New static variable.
(arc_print_operand): Update how we handle small data operands.
(arc_print_operand_address): Likewise.
(arc_legitimate_address_p): Update, use
legitimate_small_data_address_p.
(arc_rewrite_small_data_p): Remove.
(arc_rewrite_small_data_1): Likewise.
(arc_rewrite_small_data): Likewise.
(small_data_pattern): Likewise.
(compact_sda_memory_operand): Update to use
legitimate_small_data_address_p and get_symbol_alignment.
(prepare_move_operands): Don't rewite sdata pattern.
(prepare_extend_operands): Remove.
* config/arc/arc.md (zero_extendqihi2): Don't rewrite sdata
pattern.
(zero_extendqisi2): Likewise.
(zero_extendhisi2): Likewise.
(extendqihi2): Likewise.
(extendqisi2): Likewise.
(extendhisi2): Likewise.
(addsi3): Likewise.
(subsi3): Likewise.
(andsi3): Likewise.
* config/arc/constraints.md (Usd): Change it to memory constraint.
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_split_move): Allow signed 6-bit constants
as source of std instructions.
* config/arc/arc.md (movsi_insn): Update pattern predicate to
......
gcc/config/arc/arc-protos.h
......@@ -33,8 +33,6 @@ extern void arc_print_operand (FILE *, rtx, int);
extern void arc_print_operand_address (FILE *, rtx);
extern void arc_final_prescan_insn (rtx_insn *, rtx *, int);
extern const char *arc_output_libcall (const char *);
extern bool prepare_extend_operands (rtx *operands, enum rtx_code code,
machine_mode omode);
extern int arc_output_addsi (rtx *operands, bool, bool);
extern int arc_output_commutative_cond_exec (rtx *operands, bool);
extern bool arc_expand_movmem (rtx *operands);
......@@ -65,8 +63,6 @@ extern bool arc_raw_symbolic_reference_mentioned_p (rtx, bool);
extern bool arc_is_longcall_p (rtx);
extern bool arc_is_shortcall_p (rtx);
extern bool valid_brcc_with_delay_p (rtx *);
extern bool small_data_pattern (rtx , machine_mode);
extern rtx arc_rewrite_small_data (rtx);
extern bool arc_ccfsm_cond_exec_p (void);
struct secondary_reload_info;
extern int arc_register_move_cost (machine_mode, enum reg_class,
......
gcc/config/arc/arc.md
......@@ -1755,7 +1755,7 @@
[(set (match_operand:HI 0 "dest_reg_operand" "")
(zero_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
""
"if (prepare_extend_operands (operands, ZERO_EXTEND, HImode)) DONE;"
""
)
(define_insn "*zero_extendqisi2_ac"
......@@ -1779,7 +1779,7 @@
[(set (match_operand:SI 0 "dest_reg_operand" "")
(zero_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
""
"if (prepare_extend_operands (operands, ZERO_EXTEND, SImode)) DONE;"
""
)
(define_insn "*zero_extendhisi2_i"
......@@ -1804,7 +1804,7 @@
[(set (match_operand:SI 0 "dest_reg_operand" "")
(zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))]
""
"if (prepare_extend_operands (operands, ZERO_EXTEND, SImode)) DONE;"
""
)
;; Sign extension instructions.
......@@ -1827,7 +1827,7 @@
[(set (match_operand:HI 0 "dest_reg_operand" "")
(sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
""
"if (prepare_extend_operands (operands, SIGN_EXTEND, HImode)) DONE;"
""
)
(define_insn "*extendqisi2_ac"
......@@ -1847,7 +1847,7 @@
[(set (match_operand:SI 0 "dest_reg_operand" "")
(sign_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
""
"if (prepare_extend_operands (operands, SIGN_EXTEND, SImode)) DONE;"
""
)
(define_insn "*extendhisi2_i"
......@@ -1868,7 +1868,7 @@
[(set (match_operand:SI 0 "dest_reg_operand" "")
(sign_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))]
""
"if (prepare_extend_operands (operands, SIGN_EXTEND, SImode)) DONE;"
""
)
;; Unary arithmetic insns
......@@ -2761,11 +2761,6 @@
{
operands[2]=force_reg(SImode, operands[2]);
}
else if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[2], Pmode))
{
operands[2] = force_reg (SImode, arc_rewrite_small_data (operands[2]));
}
")
(define_expand "adddi3"
......@@ -2969,8 +2964,6 @@
}
if (flag_pic && arc_raw_symbolic_reference_mentioned_p (operands[c], false))
operands[c] = force_reg (SImode, operands[c]);
else if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[c], Pmode))
operands[c] = force_reg (SImode, arc_rewrite_small_data (operands[c]));
}")
; the casesi expander might generate a sub of zero, so we have to recognize it.
......@@ -3326,8 +3319,7 @@
""
"if (!satisfies_constraint_Cux (operands[2]))
operands[1] = force_reg (SImode, operands[1]);
else if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[1], Pmode))
operands[1] = arc_rewrite_small_data (operands[1]);")
")
(define_insn "andsi3_i"
[(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,Rcq,Rcqq,Rcqq,Rcqq,Rcw,Rcw, Rcw,Rcw,Rcw,Rcw, w, w, w, w,Rrq,w,Rcw, w,W")
......
gcc/config/arc/constraints.md
......@@ -347,11 +347,7 @@
(match_test "!cmem_address (XEXP (op, 0), SImode)")
(not (match_operand 0 "long_immediate_loadstore_operand"))))
; Don't use define_memory_constraint here as the relocation patching
; for small data symbols only works within a ld/st instruction and
; define_memory_constraint may result in the address being calculated
; into a register first.
(define_constraint "Usd"
(define_memory_constraint "Usd"
"@internal
A valid _small-data_ memory operand for ARCompact instructions"
(and (match_code "mem")
......
gcc/testsuite/ChangeLog
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/interrupt-8.c: Update test.
* gcc.target/arc/loop-4.c: Likewise.
* gcc.target/arc/loop-hazard-1.c: Likewise.
* gcc.target/arc/sdata-3.c: Likewise.
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/store-merge-1.c: New test.
* gcc.target/arc/add_n-combine.c: Update test.
......
gcc/testsuite/gcc.target/arc/interrupt-8.c
......@@ -2,8 +2,7 @@
/* { dg-skip-if "Not available for ARCv1" { arc700 || arc6xx } } */
/* { dg-options "-O2 -mirq-ctrl-saved=r0-r17" } */
/* Check if the registers R0-R17 are automatically saved. GP is saved
by the compiler. */
/* Check if the registers R0-R17 are automatically saved. */
int a;
......@@ -18,8 +17,6 @@ foo(void)
/* { dg-final { scan-assembler-not "st.*r14,\\\[sp" } } */
/* { dg-final { scan-assembler-not "st.*r15,\\\[sp" } } */
/* { dg-final { scan-assembler-not "st.*r16,\\\[sp" } } */
/* { dg-final { scan-assembler "st.*gp,\\\[sp,-4\\\]" } } */
/* { dg-final { scan-assembler "ld.*gp,\\\[sp\\\]" } } */
/* { dg-final { scan-assembler-not "st.*r0,\\\[sp" } } */
/* { dg-final { scan-assembler-not "st.*r1,\\\[sp" } } */
/* { dg-final { scan-assembler-not "st.*r2,\\\[sp" } } */
......
gcc/testsuite/gcc.target/arc/loop-4.c
/* { dg-do assemble } */
/* { dg-do compile } */
/* { dg-options "-Os" } */
/* { dg-options "-Os -fbranch-count-reg" } */
void fn1(void *p1, int p2, int p3)
......
gcc/testsuite/gcc.target/arc/loop-hazard-1.c
/* { dg-do compile } */
/* { dg-options "-Os" } */
/* { dg-options "-Os -fbranch-count-reg" } */
/* This caused an assertion within arc_loop_hazard. */
......
gcc/testsuite/gcc.target/arc/sdata-3.c
......@@ -10,9 +10,13 @@ short g_c;
char g_d;
#define TEST(name, optype) \
void test_ ## name (optype x) \
optype testLD_ ## name (optype x) \
{ \
g_ ## name += x; \
return g_ ## name + x; \
} \
void testST_ ## name (optype x) \
{ \
g_ ## name = x; \
}
TEST (a, int)
......
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