* config/h8300/h8300.md (*andsi3_ashift_n_lower): New.

From-SVN: r61702

gcc/ChangeLog

+2003-01-24  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/h8300/h8300.md (*andsi3_ashift_n_lower): New.
+
 2003-01-24  Volker Reichelt  <reichelt@igpm.rwth-aachen.de>
 
 	* doc/bugreport.texi: Use @command instead of @code for commands.

gcc/config/h8300/h8300.md

@@ -2597,6 +2597,27 @@
 	      (clobber (scratch:QI))])]
   "")
 
+;; Transform (SImode << B) & 0xffff into (SImode) (HImode << B).
+
+(define_insn_and_split "*andsi3_ashift_n_lower"
+  [(set (match_operand:SI 0 "register_operand" "=r,r")
+	(and:SI (ashift:SI (match_operand:SI 1 "register_operand" "0,0")
+			   (match_operand:QI 2 "const_int_operand" "S,n"))
+		(match_operand:SI 3 "const_int_operand" "n,n")))
+   (clobber (match_scratch:QI 4 "=X,&r"))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && INTVAL (operands[2]) <= 15
+   && INTVAL (operands[3]) == ((-1 << INTVAL (operands[2])) & 0xffff)"
+  "#"
+  "&& reload_completed"
+  [(parallel [(set (match_dup 5)
+		   (ashift:HI (match_dup 5)
+			      (match_dup 2)))
+	      (clobber (match_dup 4))])
+   (set (match_dup 0)
+	(zero_extend:SI (match_dup 5)))]
+  "operands[5] = gen_rtx_REG (HImode, REGNO (operands[0]));")
+
 ;; Accept (A >> 30) & 2 and the like.
 
 (define_insn "*andsi3_lshiftrt_n_sb"