(adddi3, subdi3): Need scratch reg whenever operand 0 in mem and operands 1 not '0'.

(adddi3, subdi3): Need scratch reg whenever operand 0 in mem and operands 1
not '0'.
(subdi3): Don't treat two non-equal MEMs as non-aliasing.

From-SVN: r9342

gcc/config/i386/i386.md

@@ -2382,7 +2382,7 @@
   [(set (match_operand:DI 0 "general_operand" "=&r,ro,o,&r,ro,o,&r,o,o,o")
 	(plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,o,riF,o,or,riF,riF,o")
 		 (match_operand:DI 2 "general_operand" "o,riF,o,0,0,0,oriF,riF,o,o")))
-   (clobber (match_scratch:SI 3 "=X,X,&r,X,X,&r,X,X,&r,&r"))]
+   (clobber (match_scratch:SI 3 "=X,X,&r,X,&r,&r,X,&r,&r,&r"))]
   ""
   "*
 {
@@ -2633,7 +2633,7 @@
   [(set (match_operand:DI 0 "general_operand" "=&r,ro,&r,o,o")
 	(minus:DI (match_operand:DI 1 "general_operand" "0,0,roiF,riF,o")
 		  (match_operand:DI 2 "general_operand" "o,riF,roiF,riF,o")))
-   (clobber (match_scratch:SI 3 "=X,X,X,X,&r"))]
+   (clobber (match_scratch:SI 3 "=X,X,X,&r,&r"))]
   ""
   "*
 {
@@ -2650,7 +2650,7 @@
       xops[2] = high[1];
       xops[3] = low[1];
 
-      if (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
+      if (GET_CODE (operands[0]) != MEM)
 	{
 	  output_asm_insn (AS2 (mov%L1,%3,%1), xops);
 	  output_asm_insn (AS2 (mov%L0,%2,%0), xops);