Commit dd95128b by Andreas Krebbel Committed by Andreas Krebbel

S/390: Rename shift_count_or_setmem_operand to setmem_operand

The shift_count_or_setmem_operand predicate is now only used for
setmem patterns anymore.  Rename it together with the related
functions.

gcc/ChangeLog:

2016-03-11  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/constraints.md: Adjust comment.
	("Y"): Adjust comment.  Rename s390_decompose_shift_count to
	s390_decompose_addrstyle_without_index.
	* config/s390/predicates.md (shift_count_or_setmem_operand):
	Rename to setmem_operand.
	* config/s390/s390-protos.h
	(s390_decompose_shift_count): Rename to
	s390_decompose_addrstyle_without_index.
	* config/s390/s390.c (s390_decompose_shift_count)
	(s390_mem_constraint, print_shift_count_operand)
	(print_operand_address, print_operand): Rename
	s390_decompose_shift_count to
	s390_decompose_addrstyle_without_index and rename
	print_shift_count_operand to print_addrstyle_operand troughout the
	file.
	* config/s390/s390.md ("setmem_long_<P:mode>", "*setmem_long")
	("*setmem_long_and", "*setmem_long_31z", "*setmem_long_and_31z"):
	Rename shift_count_or_setmem_operand to setmem_operand.
	* config/s390/vx-builtins.md ("vec_insert<mode>")
	("vec_promote<mode>"): Replace shift_count_or_setmem_operand with
	nonmemory_operand.

From-SVN: r234132
parent a0232c64
2016-03-11 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/constraints.md: Adjust comment.
("Y"): Adjust comment. Rename s390_decompose_shift_count to
s390_decompose_addrstyle_without_index.
* config/s390/predicates.md (shift_count_or_setmem_operand):
Rename to setmem_operand.
* config/s390/s390-protos.h
(s390_decompose_shift_count): Rename to
s390_decompose_addrstyle_without_index.
* config/s390/s390.c (s390_decompose_shift_count)
(s390_mem_constraint, print_shift_count_operand)
(print_operand_address, print_operand): Rename
s390_decompose_shift_count to
s390_decompose_addrstyle_without_index and rename
print_shift_count_operand to print_addrstyle_operand troughout the
file.
* config/s390/s390.md ("setmem_long_<P:mode>", "*setmem_long")
("*setmem_long_and", "*setmem_long_31z", "*setmem_long_and_31z"):
Rename shift_count_or_setmem_operand to setmem_operand.
* config/s390/vx-builtins.md ("vec_insert<mode>")
("vec_promote<mode>"): Replace shift_count_or_setmem_operand with
nonmemory_operand.
2016-03-10 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> 2016-03-10 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
PR target/70168 PR target/70168
......
...@@ -79,7 +79,7 @@ ...@@ -79,7 +79,7 @@
;; does *not* refer to a literal pool entry. ;; does *not* refer to a literal pool entry.
;; U -- Pointer with short displacement. (deprecated - use ZQZR) ;; U -- Pointer with short displacement. (deprecated - use ZQZR)
;; W -- Pointer with long displacement. (deprecated - use ZSZT) ;; W -- Pointer with long displacement. (deprecated - use ZSZT)
;; Y -- Shift count operand. ;; Y -- Address style operand without index.
;; ZQ -- Pointer without index register and with short displacement. ;; ZQ -- Pointer without index register and with short displacement.
;; ZR -- Pointer with index register and short displacement. ;; ZR -- Pointer with index register and short displacement.
;; ZS -- Pointer without index register but with long displacement. ;; ZS -- Pointer without index register but with long displacement.
...@@ -189,12 +189,12 @@ ...@@ -189,12 +189,12 @@
(define_address_constraint "Y" (define_address_constraint "Y"
"Shift count operand" "Address style operand without index register"
;; Simply check for the basic form of a shift count. Reload will ;; Simply check for base + offset style operands. Reload will take
;; take care of making sure we have a proper base register. ;; care of making sure we have a proper base register.
(match_test "s390_decompose_shift_count (op, NULL, NULL)" )) (match_test "s390_decompose_addrstyle_without_index (op, NULL, NULL)" ))
;; N -- Multiple letter constraint followed by 4 parameter letters. ;; N -- Multiple letter constraint followed by 4 parameter letters.
......
...@@ -87,7 +87,7 @@ ...@@ -87,7 +87,7 @@
;; Return true if OP is a valid operand as scalar shift count or setmem. ;; Return true if OP is a valid operand as scalar shift count or setmem.
(define_predicate "shift_count_or_setmem_operand" (define_predicate "setmem_operand"
(match_code "reg, subreg, plus, const_int") (match_code "reg, subreg, plus, const_int")
{ {
HOST_WIDE_INT offset; HOST_WIDE_INT offset;
...@@ -98,7 +98,7 @@ ...@@ -98,7 +98,7 @@
return false; return false;
/* Extract base register and offset. */ /* Extract base register and offset. */
if (!s390_decompose_shift_count (op, &base, &offset)) if (!s390_decompose_addrstyle_without_index (op, &base, &offset))
return false; return false;
/* Don't allow any non-base hard registers. Doing so without /* Don't allow any non-base hard registers. Doing so without
......
...@@ -139,7 +139,8 @@ extern rtx_insn *s390_load_got (void); ...@@ -139,7 +139,8 @@ extern rtx_insn *s390_load_got (void);
extern rtx s390_get_thread_pointer (void); extern rtx s390_get_thread_pointer (void);
extern void s390_emit_tpf_eh_return (rtx); extern void s390_emit_tpf_eh_return (rtx);
extern bool s390_legitimate_address_without_index_p (rtx); extern bool s390_legitimate_address_without_index_p (rtx);
extern bool s390_decompose_shift_count (rtx, rtx *, HOST_WIDE_INT *); extern bool s390_decompose_addrstyle_without_index (rtx, rtx *,
HOST_WIDE_INT *);
extern int s390_branch_condition_mask (rtx); extern int s390_branch_condition_mask (rtx);
extern int s390_compare_and_branch_condition_mask (rtx); extern int s390_compare_and_branch_condition_mask (rtx);
extern bool s390_extzv_shift_ok (int, int, unsigned HOST_WIDE_INT); extern bool s390_extzv_shift_ok (int, int, unsigned HOST_WIDE_INT);
......
...@@ -2982,13 +2982,16 @@ s390_decompose_address (rtx addr, struct s390_address *out) ...@@ -2982,13 +2982,16 @@ s390_decompose_address (rtx addr, struct s390_address *out)
return true; return true;
} }
/* Decompose a RTL expression OP for a shift count into its components, /* Decompose a RTL expression OP for an address style operand into its
and return the base register in BASE and the offset in OFFSET. components, and return the base register in BASE and the offset in
OFFSET. While OP looks like an address it is never supposed to be
used as such.
Return true if OP is a valid shift count, false if not. */ Return true if OP is a valid address operand, false if not. */
bool bool
s390_decompose_shift_count (rtx op, rtx *base, HOST_WIDE_INT *offset) s390_decompose_addrstyle_without_index (rtx op, rtx *base,
HOST_WIDE_INT *offset)
{ {
rtx off = NULL_RTX; rtx off = NULL_RTX;
...@@ -3203,7 +3206,7 @@ s390_mem_constraint (const char *str, rtx op) ...@@ -3203,7 +3206,7 @@ s390_mem_constraint (const char *str, rtx op)
case 'Y': case 'Y':
/* Simply check for the basic form of a shift count. Reload will /* Simply check for the basic form of a shift count. Reload will
take care of making sure we have a proper base register. */ take care of making sure we have a proper base register. */
if (!s390_decompose_shift_count (op, NULL, NULL)) if (!s390_decompose_addrstyle_without_index (op, NULL, NULL))
return 0; return 0;
break; break;
case 'Z': case 'Z':
...@@ -6878,13 +6881,13 @@ s390_delegitimize_address (rtx orig_x) ...@@ -6878,13 +6881,13 @@ s390_delegitimize_address (rtx orig_x)
instead the rightmost bits are interpreted as the value. */ instead the rightmost bits are interpreted as the value. */
static void static void
print_shift_count_operand (FILE *file, rtx op) print_addrstyle_operand (FILE *file, rtx op)
{ {
HOST_WIDE_INT offset; HOST_WIDE_INT offset;
rtx base; rtx base;
/* Extract base register and offset. */ /* Extract base register and offset. */
if (!s390_decompose_shift_count (op, &base, &offset)) if (!s390_decompose_addrstyle_without_index (op, &base, &offset))
gcc_unreachable (); gcc_unreachable ();
/* Sanity check. */ /* Sanity check. */
...@@ -7180,7 +7183,8 @@ print_operand_address (FILE *file, rtx addr) ...@@ -7180,7 +7183,8 @@ print_operand_address (FILE *file, rtx addr)
'O': print only the displacement of a memory reference or address. 'O': print only the displacement of a memory reference or address.
'R': print only the base register of a memory reference or address. 'R': print only the base register of a memory reference or address.
'S': print S-type memory reference (base+displacement). 'S': print S-type memory reference (base+displacement).
'Y': print shift count operand. 'Y': print address style operand without index (e.g. shift count or setmem
operand).
'b': print integer X as if it's an unsigned byte. 'b': print integer X as if it's an unsigned byte.
'c': print integer X as if it's an signed byte. 'c': print integer X as if it's an signed byte.
...@@ -7348,7 +7352,7 @@ print_operand (FILE *file, rtx x, int code) ...@@ -7348,7 +7352,7 @@ print_operand (FILE *file, rtx x, int code)
break; break;
case 'Y': case 'Y':
print_shift_count_operand (file, x); print_addrstyle_operand (file, x);
return; return;
} }
......
...@@ -3296,7 +3296,7 @@ ...@@ -3296,7 +3296,7 @@
[(parallel [(parallel
[(clobber (match_dup 1)) [(clobber (match_dup 1))
(set (match_operand:BLK 0 "memory_operand" "") (set (match_operand:BLK 0 "memory_operand" "")
(unspec:BLK [(match_operand:P 2 "shift_count_or_setmem_operand" "") (unspec:BLK [(match_operand:P 2 "setmem_operand" "")
(match_dup 4)] UNSPEC_REPLICATE_BYTE)) (match_dup 4)] UNSPEC_REPLICATE_BYTE))
(use (match_dup 3)) (use (match_dup 3))
(clobber (reg:CC CC_REGNUM))])] (clobber (reg:CC CC_REGNUM))])]
...@@ -3326,7 +3326,7 @@ ...@@ -3326,7 +3326,7 @@
(define_insn "*setmem_long" (define_insn "*setmem_long"
[(clobber (match_operand:<DBL> 0 "register_operand" "=d")) [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
(set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0)) (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
(unspec:BLK [(match_operand:P 2 "shift_count_or_setmem_operand" "Y") (unspec:BLK [(match_operand:P 2 "setmem_operand" "Y")
(subreg:P (match_dup 3) <modesize>)] (subreg:P (match_dup 3) <modesize>)]
UNSPEC_REPLICATE_BYTE)) UNSPEC_REPLICATE_BYTE))
(use (match_operand:<DBL> 1 "register_operand" "d")) (use (match_operand:<DBL> 1 "register_operand" "d"))
...@@ -3340,7 +3340,7 @@ ...@@ -3340,7 +3340,7 @@
[(clobber (match_operand:<DBL> 0 "register_operand" "=d")) [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
(set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0)) (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
(unspec:BLK [(and:P (unspec:BLK [(and:P
(match_operand:P 2 "shift_count_or_setmem_operand" "Y") (match_operand:P 2 "setmem_operand" "Y")
(match_operand:P 4 "const_int_operand" "n")) (match_operand:P 4 "const_int_operand" "n"))
(subreg:P (match_dup 3) <modesize>)] (subreg:P (match_dup 3) <modesize>)]
UNSPEC_REPLICATE_BYTE)) UNSPEC_REPLICATE_BYTE))
...@@ -3358,7 +3358,7 @@ ...@@ -3358,7 +3358,7 @@
(define_insn "*setmem_long_31z" (define_insn "*setmem_long_31z"
[(clobber (match_operand:TI 0 "register_operand" "=d")) [(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4)) (set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
(unspec:BLK [(match_operand:SI 2 "shift_count_or_setmem_operand" "Y") (unspec:BLK [(match_operand:SI 2 "setmem_operand" "Y")
(subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE)) (subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
(use (match_operand:TI 1 "register_operand" "d")) (use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))] (clobber (reg:CC CC_REGNUM))]
...@@ -3371,8 +3371,8 @@ ...@@ -3371,8 +3371,8 @@
[(clobber (match_operand:TI 0 "register_operand" "=d")) [(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4)) (set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
(unspec:BLK [(and:SI (unspec:BLK [(and:SI
(match_operand:SI 2 "shift_count_or_setmem_operand" "Y") (match_operand:SI 2 "setmem_operand" "Y")
(match_operand:SI 4 "const_int_operand" "n")) (match_operand:SI 4 "const_int_operand" "n"))
(subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE)) (subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
(use (match_operand:TI 1 "register_operand" "d")) (use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))] (clobber (reg:CC CC_REGNUM))]
......
...@@ -150,7 +150,7 @@ ...@@ -150,7 +150,7 @@
(define_expand "vec_insert<mode>" (define_expand "vec_insert<mode>"
[(set (match_operand:V_HW 0 "register_operand" "") [(set (match_operand:V_HW 0 "register_operand" "")
(unspec:V_HW [(match_operand:<non_vec> 2 "register_operand" "") (unspec:V_HW [(match_operand:<non_vec> 2 "register_operand" "")
(match_operand:SI 3 "shift_count_or_setmem_operand" "") (match_operand:SI 3 "nonmemory_operand" "")
(match_operand:V_HW 1 "register_operand" "")] (match_operand:V_HW 1 "register_operand" "")]
UNSPEC_VEC_SET))] UNSPEC_VEC_SET))]
"TARGET_VX" "TARGET_VX"
...@@ -160,7 +160,7 @@ ...@@ -160,7 +160,7 @@
(define_expand "vec_promote<mode>" (define_expand "vec_promote<mode>"
[(set (match_operand:V_HW 0 "register_operand" "") [(set (match_operand:V_HW 0 "register_operand" "")
(unspec:V_HW [(match_operand:<non_vec> 1 "register_operand" "") (unspec:V_HW [(match_operand:<non_vec> 1 "register_operand" "")
(match_operand:SI 2 "shift_count_or_setmem_operand" "") (match_operand:SI 2 "nonmemory_operand" "")
(match_dup 0)] (match_dup 0)]
UNSPEC_VEC_SET))] UNSPEC_VEC_SET))]
"TARGET_VX" "TARGET_VX"
......
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