Commit dc355223 by Segher Boessenkool Committed by Segher Boessenkool

Restrict a VSX extract to TARGET_POWERPC64 (PR88213)

This pattern optimises a scalar extract from a vector loaded from
memory to be just a scalar load from memory.  But to do a 64-bit
integer load you need 64-bit integer registers, which needs
TARGET_POWERPC64.


	PR target/88213
	* config/rs6000/vsx.md (*vsx_extract_<P:mode>_<VSX_D:mode>_load):
	Require TARGET_POWERPC64.

From-SVN: r267263
parent 08926e6f
2018-12-19 Segher Boessenkool <segher@kernel.crashing.org>
PR target/88213
* config/rs6000/vsx.md (*vsx_extract_<P:mode>_<VSX_D:mode>_load):
Require TARGET_POWERPC64.
2018-12-19 Richard Biener <rguenther@suse.de> 2018-12-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/88533 PR tree-optimization/88533
...@@ -3257,7 +3257,7 @@ ...@@ -3257,7 +3257,7 @@
(match_operand:VSX_D 1 "memory_operand" "m,m") (match_operand:VSX_D 1 "memory_operand" "m,m")
(parallel [(match_operand:QI 2 "const_0_to_1_operand" "n,n")]))) (parallel [(match_operand:QI 2 "const_0_to_1_operand" "n,n")])))
(clobber (match_scratch:P 3 "=&b,&b"))] (clobber (match_scratch:P 3 "=&b,&b"))]
"VECTOR_MEM_VSX_P (<VSX_D:MODE>mode)" "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (<VSX_D:MODE>mode)"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(set (match_dup 0) (match_dup 4))] [(set (match_dup 0) (match_dup 4))]
......
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