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riscv-gcc-1
Commit db340c73 by Andreas Krebbel
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S/390: Revert setmem pattern folding 

This does not work without:
https://gcc.gnu.org/ml/gcc-patches/2016-02/msg01575.html

2016-03-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	Revert
	2016-03-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/constraints.md ("jm8"): New constraint.
	* config/s390/predicates.md ("const_int_8bitset_operand"): New predicate.
	* config/s390/s390.md ("*setmem_long", "*setmem_long_and"): Merge
	into ...
	("*setmem_long<setmem_and>"): New pattern.
	("*setmem_long_31z", "*setmem_long_and_31z"): Merge
	into ...
	("*setmem_long_31z<setmem_and>"): New pattern.
	* config/s390/subst.md ("setmem_31z_subst", "setmem_and_subst"):
	New substitution rules with the required attributes.

From-SVN: r233854
parent a7ba15ca
Showing with 50 additions and 51 deletions
gcc/ChangeLog
......@@ -3,6 +3,23 @@
Revert
2016-03-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/constraints.md ("jm8"): New constraint.
* config/s390/predicates.md ("const_int_8bitset_operand"): New predicate.
* config/s390/s390.md ("*setmem_long", "*setmem_long_and"): Merge
into ...
("*setmem_long<setmem_and>"): New pattern.
("*setmem_long_31z", "*setmem_long_and_31z"): Merge
into ...
("*setmem_long_31z<setmem_and>"): New pattern.
* config/s390/subst.md ("setmem_31z_subst", "setmem_and_subst"):
New substitution rules with the required attributes.
2016-03-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Revert
2016-03-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gensupport.c (process_substs_on_one_elem): Split loop to
complete mark_operands_used_in_match_dup on all expressions in the
vector first.
......@@ -34,19 +51,6 @@
2016-03-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/constraints.md ("jm8"): New constraint.
* config/s390/predicates.md ("const_int_8bitset_operand"): New predicate.
* config/s390/s390.md ("*setmem_long", "*setmem_long_and"): Merge
into ...
("*setmem_long<setmem_and>"): New pattern.
("*setmem_long_31z", "*setmem_long_and_31z"): Merge
into ...
("*setmem_long_31z<setmem_and>"): New pattern.
* config/s390/subst.md ("setmem_31z_subst", "setmem_and_subst"):
New substitution rules with the required attributes.
2016-03-01 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/subst.md (DSI_VI): New mode iterator.
("addr_style_op_subst"): Use DSI_VI instead of DSI.
* config/s390/vector.md ("vec_set<mode>"): Move expander before
......
gcc/config/s390/constraints.md
......@@ -37,7 +37,6 @@
;; jKK: constant vector with all elements having the same value and
;; matching K constraint
;; jm6: An integer operand with the lowest order 6 bits all ones.
;; jm8: An integer operand with the lowest order 8 bits all ones.
;; t -- Access registers 36 and 37.
;; v -- Vector registers v0-v31.
;; C -- A signed 8-bit constant (-128..127)
......@@ -421,10 +420,6 @@
"@internal An integer operand with the lowest order 6 bits all ones."
(match_operand 0 "const_int_6bitset_operand"))
(define_constraint "jm8"
"@internal An integer operand with the lowest order 8 bits all ones."
(match_operand 0 "const_int_8bitset_operand"))
;;
;; Memory constraints follow.
;;
......
gcc/config/s390/predicates.md
......@@ -119,12 +119,6 @@
(define_predicate "const_int_6bitset_operand"
(and (match_code "const_int")
(match_test "(INTVAL (op) & 63) == 63")))
; An integer operand with the lowest order 8 bits all ones.
(define_predicate "const_int_8bitset_operand"
(and (match_code "const_int")
(match_test "(INTVAL (op) & 255) == 255")))
(define_predicate "nonzero_shift_count_operand"
(and (match_code "const_int")
(match_test "IN_RANGE (INTVAL (op), 1, GET_MODE_BITSIZE (mode) - 1)")))
......
gcc/config/s390/s390.md
......@@ -3323,7 +3323,7 @@
; Patterns for 31 bit + Esa and 64 bit + Zarch.
(define_insn "*setmem_long<setmem_and>"
(define_insn "*setmem_long"
[(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
(set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
(unspec:BLK [(match_operand:P 2 "shift_count_or_setmem_operand" "Y")
......@@ -3336,10 +3336,26 @@
[(set_attr "length" "8")
(set_attr "type" "vs")])
(define_insn "*setmem_long_and"
[(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
(set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
(unspec:BLK [(and:P
(match_operand:P 2 "shift_count_or_setmem_operand" "Y")
(match_operand:P 4 "const_int_operand" "n"))
(subreg:P (match_dup 3) <modesize>)]
UNSPEC_REPLICATE_BYTE))
(use (match_operand:<DBL> 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
"(TARGET_64BIT || !TARGET_ZARCH) &&
(INTVAL (operands[4]) & 255) == 255"
"mvcle\t%0,%1,%Y2\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
; Variants for 31 bit + Zarch, necessary because of the odd in-register offsets
; of the SImode subregs.
(define_insn "*setmem_long_31z<setmem_and>"
(define_insn "*setmem_long_31z"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
(unspec:BLK [(match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
......@@ -3351,6 +3367,21 @@
[(set_attr "length" "8")
(set_attr "type" "vs")])
(define_insn "*setmem_long_and_31z"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
(unspec:BLK [(and:SI
(match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
(match_operand:SI 4 "const_int_operand" "n"))
(subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
(use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
"(!TARGET_64BIT && TARGET_ZARCH) &&
(INTVAL (operands[4]) & 255) == 255"
"mvcle\t%0,%1,%Y2\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
;
; cmpmemM instruction pattern(s).
;
......
gcc/config/s390/subst.md
......@@ -120,28 +120,3 @@
(clobber (match_scratch:DSI 0 "=d,d"))])
(define_subst_attr "cconly" "cconly_subst" "" "_cconly")
;; setmem substitution patterns
; Add an AND operation on the padding byte operand. Only the lowest 8
; bit are used and the rest is ignored.
(define_subst "setmem_and_subst"
[(clobber (match_operand:TDI 0 "register_operand" ""))
(set (mem:BLK (subreg:DSI (match_operand:TDI 1 "register_operand" "") 0))
(unspec:BLK [(match_operand:DSI 2 "shift_count_or_setmem_operand" "")
(match_operand:DSI 3 "register_operand" "")]
UNSPEC_REPLICATE_BYTE))
(use (match_operand:TDI 4 "register_operand" ""))
(clobber (reg:CC CC_REGNUM))]
""
[(clobber (match_dup 0))
(set (mem:BLK (subreg:DSI (match_dup 1) 0))
(unspec:BLK [(and:DSI (match_dup 2)
(match_operand:DSI 5 "const_int_8bitset_operand" "jm8"))
(match_dup 3)]
UNSPEC_REPLICATE_BYTE))
(use (match_dup 4))
(clobber (reg:CC CC_REGNUM))])
(define_subst_attr "setmem_and" "setmem_and_subst" "" "_and")
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