MIPS: Relax instruction order check in msa-builtins.c.
gcc/testsuite * gcc.target/mips/msa-builtins.c (msa_insert_d): Tweak expected output. From-SVN: r243848
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gcc/testsuite * gcc.target/mips/msa-builtins.c (msa_insert_d): Tweak expected output. From-SVN: r243848