Commit db2675d3 by Joseph Myers Committed by Joseph Myers

eabispe.h (TARGET_DEFAULT): Include MASK_STRICT_ALIGN.

	* config/rs6000/eabispe.h (TARGET_DEFAULT): Include
	MASK_STRICT_ALIGN.
	* config/rs6000/linuxspe.h (TARGET_DEFAULT): Likewise.
	* config/rs6000/rs6000.c (rs6000_override_options): Use
	MASK_STRICT_ALIGN for 8540 and 8548.  Add MASK_STRICT_ALIGN to
	POWERPC_MASKS.

From-SVN: r119156
parent 2cc96acc
2006-11-24 Joseph Myers <joseph@codesourcery.com>
* config/rs6000/eabispe.h (TARGET_DEFAULT): Include
MASK_STRICT_ALIGN.
* config/rs6000/linuxspe.h (TARGET_DEFAULT): Likewise.
* config/rs6000/rs6000.c (rs6000_override_options): Use
MASK_STRICT_ALIGN for 8540 and 8548. Add MASK_STRICT_ALIGN to
POWERPC_MASKS.
2006-11-24 Andreas Krebbel <krebbel1@de.ibm.com> 2006-11-24 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390.c (s390_emit_compare_and_swap): New function. * config/s390.c (s390_emit_compare_and_swap): New function.
......
...@@ -21,7 +21,8 @@ ...@@ -21,7 +21,8 @@
MA 02110-1301, USA. */ MA 02110-1301, USA. */
#undef TARGET_DEFAULT #undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI) #define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI \
| MASK_STRICT_ALIGN)
#undef TARGET_VERSION #undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded SPE)"); #define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded SPE)");
......
...@@ -25,7 +25,7 @@ ...@@ -25,7 +25,7 @@
/* Override rs6000.h and sysv4.h definition. */ /* Override rs6000.h and sysv4.h definition. */
#undef TARGET_DEFAULT #undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS) #define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN)
#undef TARGET_SPE_ABI #undef TARGET_SPE_ABI
#undef TARGET_SPE #undef TARGET_SPE
......
...@@ -1235,9 +1235,11 @@ rs6000_override_options (const char *default_cpu) ...@@ -1235,9 +1235,11 @@ rs6000_override_options (const char *default_cpu)
{"801", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, {"801", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"821", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, {"821", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"823", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, {"823", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, {"8540", PROCESSOR_PPC8540,
POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_STRICT_ALIGN},
/* 8548 has a dummy entry for now. */ /* 8548 has a dummy entry for now. */
{"8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, {"8548", PROCESSOR_PPC8540,
POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_STRICT_ALIGN},
{"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, {"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"970", PROCESSOR_POWER4, {"970", PROCESSOR_POWER4,
POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64}, POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
...@@ -1291,7 +1293,7 @@ rs6000_override_options (const char *default_cpu) ...@@ -1291,7 +1293,7 @@ rs6000_override_options (const char *default_cpu)
enum { enum {
POWER_MASKS = MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, POWER_MASKS = MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
POWERPC_MASKS = (POWERPC_BASE_MASK | MASK_PPC_GPOPT POWERPC_MASKS = (POWERPC_BASE_MASK | MASK_PPC_GPOPT | MASK_STRICT_ALIGN
| MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_ALTIVEC | MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_ALTIVEC
| MASK_MFCRF | MASK_POPCNTB | MASK_FPRND | MASK_MULHW | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND | MASK_MULHW
| MASK_DLMZB | MASK_MFPGPR) | MASK_DLMZB | MASK_MFPGPR)
......
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