Commit dab03fe3 by Walter Lee Committed by Walter Lee

tilegx-c.c (tilegx_cpu_cpp_builtins): Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.

2014-01-25  Walter Lee  <walt@tilera.com>

            * config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins): 
            Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.
            * config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins): 
            Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}.

From-SVN: r207083
parent 905c20c1
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins):
Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.
* config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins):
Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}.
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilegx/tilegx.c (tilegx_function_arg): Start 16-byte
arguments on even registers.
(tilegx_gimplify_va_arg_expr): Align 16-byte var args to
......
......@@ -47,6 +47,9 @@ tilegx_cpu_cpp_builtins (struct cpp_reader *pfile)
if (TARGET_32BIT)
builtin_define ("__tilegx32__");
builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
TILEGX_CPU_CPP_ENDIAN_BUILTINS ();
GNU_USER_TARGET_OS_CPP_BUILTINS ();
}
......
......@@ -44,6 +44,11 @@ tilepro_cpu_cpp_builtins (struct cpp_reader *pfile)
builtin_define ("__tile_chip__=1");
builtin_define ("__tile_chip_rev__=0");
builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
TILEPRO_CPU_CPP_ENDIAN_BUILTINS ();
GNU_USER_TARGET_OS_CPP_BUILTINS ();
}
......
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