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riscv-gcc-1
Commit da80c6b8 by Uros Bizjak Committed by Uros Bizjak
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alpha.c (alpha_emit_set_long_const): Remove c1 argument. 

	* config/alpha/alpha.c (alpha_emit_set_long_const): Remove c1 argument.
	(alpha_extract_integer): Redeclare as static HOST_WIDE_INT.
	Remove *p0 and *p1 arguments.  Rewrite function.
	(alpha_legitimate_constant_p): Update call to alpha_extract_integer.
	(alpha_split_const_mov): Update calls to alpha_extract_integer and
	alpha_emit_set_long_const.
	(alpha_expand_epilogue): Update calls to alpha_emit_set_long_const.
	(alpha_output_mi_thunk_osf): Ditto.
	* config/alpha/alpha.md (movti): Do not check operands[1]
	for CONST_DOUBLE.

From-SVN: r223166
parent 1ece8d4c
Showing with 37 additions and 30 deletions
gcc/ChangeLog
2015-05-13 Uros Bizjak <ubizjak@gmail.com>
* config/alpha/alpha.c (alpha_emit_set_long_const): Remove c1 argument.
(alpha_extract_integer): Redeclare as static HOST_WIDE_INT.
Remove *p0 and *p1 arguments. Rewrite function.
(alpha_legitimate_constant_p): Update call to alpha_extract_integer.
(alpha_split_const_mov): Update calls to alpha_extract_integer and
alpha_emit_set_long_const.
(alpha_expand_epilogue): Update calls to alpha_emit_set_long_const.
(alpha_output_mi_thunk_osf): Ditto.
* config/alpha/alpha.md (movti): Do not check operands[1]
for CONST_DOUBLE.
2015-05-13 Richard Biener <rguenther@suse.de>
PR tree-optimization/66129
......
gcc/config/alpha/alpha.c
......@@ -2068,13 +2068,12 @@ alpha_emit_set_const (rtx target, machine_mode mode,
with alpha_emit_set_const. */
static rtx
alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1)
{
HOST_WIDE_INT d1, d2, d3, d4;
/* Decompose the entire word */
gcc_assert (c2 == -(c1 < 0));
d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
c1 -= d1;
d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
......@@ -2109,25 +2108,23 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
/* Given an integral CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
or CONST_VECTOR, return the low 64 bits. */
static void
alpha_extract_integer (rtx x, HOST_WIDE_INT *p0, HOST_WIDE_INT *p1)
static HOST_WIDE_INT
alpha_extract_integer (rtx x)
{
HOST_WIDE_INT i0, i1;
if (GET_CODE (x) == CONST_VECTOR)
x = simplify_subreg (DImode, x, GET_MODE (x), 0);
if (CONST_INT_P (x))
i0 = INTVAL (x);
else if (CONST_WIDE_INT_P (x))
i0 = CONST_WIDE_INT_ELT (x, 0);
else
i0 = CONST_DOUBLE_LOW (x);
i1 = -(i0 < 0);
*p0 = i0;
*p1 = i1;
switch (GET_CODE (x))
{
case CONST_INT:
return INTVAL (x);
case CONST_WIDE_INT:
return CONST_WIDE_INT_ELT (x, 0);
case CONST_DOUBLE:
return CONST_DOUBLE_LOW (x);
default:
gcc_unreachable ();
}
}
/* Implement TARGET_LEGITIMATE_CONSTANT_P. This is all constants for which
......@@ -2138,7 +2135,7 @@ alpha_extract_integer (rtx x, HOST_WIDE_INT *p0, HOST_WIDE_INT *p1)
bool
alpha_legitimate_constant_p (machine_mode mode, rtx x)
{
HOST_WIDE_INT i0, i1;
HOST_WIDE_INT i0;
switch (GET_CODE (x))
{
......@@ -2185,7 +2182,7 @@ alpha_legitimate_constant_p (machine_mode mode, rtx x)
do_integer:
if (TARGET_BUILD_CONSTANTS)
return true;
alpha_extract_integer (x, &i0, &i1);
i0 = alpha_extract_integer (x);
return alpha_emit_set_const_1 (x, mode, i0, 3, true) != NULL;
default:
......@@ -2199,15 +2196,15 @@ alpha_legitimate_constant_p (machine_mode mode, rtx x)
bool
alpha_split_const_mov (machine_mode mode, rtx *operands)
{
HOST_WIDE_INT i0, i1;
HOST_WIDE_INT i0;
rtx temp = NULL_RTX;
alpha_extract_integer (operands[1], &i0, &i1);
i0 = alpha_extract_integer (operands[1]);
temp = alpha_emit_set_const (operands[0], mode, i0, 3, false);
if (!temp && TARGET_BUILD_CONSTANTS)
temp = alpha_emit_set_long_const (operands[0], i0, i1);
temp = alpha_emit_set_long_const (operands[0], i0);
if (temp)
{
......@@ -8260,8 +8257,7 @@ alpha_expand_epilogue (void)
{
/* We can't drop new things to memory this late, afaik,
so build it up by pieces. */
sp_adj2 = alpha_emit_set_long_const (tmp, frame_size,
-(frame_size < 0));
sp_adj2 = alpha_emit_set_long_const (tmp, frame_size);
gcc_assert (sp_adj2);
}
}
......@@ -8388,8 +8384,7 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
}
else
{
rtx tmp = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 0),
delta, -(delta < 0));
rtx tmp = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 0), delta);
emit_insn (gen_adddi3 (this_rtx, this_rtx, tmp));
}
......@@ -8411,7 +8406,7 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
else
{
tmp2 = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 1),
vcall_offset, -(vcall_offset < 0));
vcall_offset);
emit_insn (gen_adddi3 (tmp, tmp, tmp2));
lo = 0;
}
......
gcc/config/alpha/alpha.md
......@@ -3867,7 +3867,7 @@
operands[1] = force_reg (TFmode, operands[1]);
})
(define_insn_and_split "*movtf"
(define_insn_and_split "*movtf_internal"
[(set (match_operand:TF 0 "nonimmediate_operand" "=r,o")
(match_operand:TF 1 "input_operand" "roG,rG"))]
"register_operand (operands[0], TFmode)
......@@ -4154,8 +4154,7 @@
32-bit constants in TImode and rely on the splitter, but
this doesn't seem to be worth the pain. */
else if (CONST_INT_P (operands[1])
|| GET_CODE (operands[1]) == CONST_WIDE_INT
|| GET_CODE (operands[1]) == CONST_DOUBLE)
|| GET_CODE (operands[1]) == CONST_WIDE_INT)
{
rtx in[2], out[2], target;
......
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