neon.ml (ops): Fix regexp for vld1Q_dups64 and vld1Q_dupu64 tests.

2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

	* config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and
	vld1Q_dupu64 tests.

2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

	* gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate.
	* gcc.target/arm/neon/vld1Q_dups64.c: Likewise.

From-SVN: r189884

gcc/ChangeLog

+2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+	* config/arm/neon.ml (ops): Fix regexp for vld1Q_dups64 and
+	vld1Q_dupu64 tests.
+
 2012-07-26  Oleg Endo  <olegendo@gcc.gnu.org>
 
 	PR target/51244

gcc/config/arm/neon.ml

@@ -1445,8 +1445,10 @@ let ops =
                                         CstPtrTo Corereg |]]],
       Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
       bits_1, pf_su_8_32;
+    (* Treated identically to vld1_dup above as we now
+       do a single load followed by a duplicate.  *)
     Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (2, Dreg);
+      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
                                         CstPtrTo Corereg |]]],
       Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
       bits_1, [S64; U64];

gcc/testsuite/ChangeLog

+2012-07-26  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+	* gcc.target/arm/neon/vld1Q_dupu64.c: Regenerate.
+	* gcc.target/arm/neon/vld1Q_dups64.c: Likewise.
+
 2012-07-26  Mikael Morin  <mikael@gcc.gnu.org>
 
 	PR fortran/44354

gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c

@@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void)
   out_int64x2_t = vld1q_dup_s64 (0);
 }
 
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
 /* { dg-final { cleanup-saved-temps } } */

gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c

@@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void)
   out_uint64x2_t = vld1q_dup_u64 (0);
 }
 
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
 /* { dg-final { cleanup-saved-temps } } */